Quote Originally Posted by xsecret View Post
High raw throughput for an FP unit is nice. But in order to use this power in real-world application, you need a frontend able to feed it correctly. That means massive code optimization and a good compiler, in best case. And keep in mind the horribly slow L1 Write-Through, probably added in order to remove a bottleneck in frequency scaling. Write-Through means your writing from the frontend to the L2 "through" the L1. So, seen from the frontend, the L1 write bandwidth is as "slow" as the L2 write bandwidth. The last ľarch to use that horrible trick was Netburst, with high frequencies in mind. Bulldozer comes with a L1 WT too and that point only could explain many disappointments from a performances point of view.
So you re pretty sure Bulldozer will be slower than Thuban per core? And you are pretty sure you have final platform in your hands? If this is true then the design is truly broken is some way. Still doesn't make any sense to me. AMD knew the perf. level of Nehalem by middle of 2008 probably. They knew intel will just go up from there(Westmere,SB,SB-E,IB). And you are telling me that with all this foreknowledge they opted for Netburst-like design that is actually less competitive Vs Core generation 1 (Merom) while having only 15%-20% higher frequency potential than Family 10h ? This is ridiculous.