I somewhat agree,but it's sooo fun to speculate. Like I said,BD's improvements might look impossible from today's perspective,but the core is a radical departure from all what we have known thus far. It's like Sun's Niagara on crack,featuring OoO cores instead of in-order ones and featuring super powerful FP unit(with a ratio of 1:2 instead of 1:8 in Niagara's case).Add in very aggressive prefetch and you have an 8 core design that can kind of "morph" according to workload
. It uses many different techniques : shared front end to fill in bubbles (SMT's advantage!), full cores instead of sharing cores(adding more performance over traditional SMT approach),huge L2 benefiting both hardware threads or even single thread, "fat" 256b FMAC FP unit that can "morph" into one or two units according to workload(ST or MT via SMT!),aggressive power gating features and flip-flop design which in turn net much higher/aggressive clock throttling and clock uplift(according to workload),overall improved integer cores that have unified scheduler for mem/ALU ops instead of separate schedulers and shared pipelines,complete ISA support etc.
All in all,the design is a radical departure from anything we have seen thus far. I personally think it's a winner. Whether it is or not,we have to wait a few more months I guess.
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