Well, i think that following values might prevent PL=6
DRAM Static Read Control [Enabled]
Ai Clock Twister [Moderate]
but they give better Bandwidth from Disable/Light
Have not tested that yet, but i was looking at greg.m settings and compared to them
Edit: read some earlier posts and i saw that PL6 is possible for strap 400 and lower fsb
So, in my 9x450 i can't put in there PL6
Though according to this http://www.anandtech.com/show/2427/8
i can (6/5 divider)
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