Originally Posted by Dresdenboy The photoshopped die photo suggests that there is a lot of space between modules, NB, L3 subcaches and I/O. I'd say: 300 +/-20 mm^2. Why do they design a chip with so much empty space? It looks like lots of space just going to waste.
Last edited by -Boris-; 11-24-2010 at 02:54 AM.
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