Sure here is my template:Originally Posted by donmarkoni
I would push BCLK up to 200MHz, trying to get stable @ 4.2GHz, but you'll need to do something about your temps. Wait for the winter, maybe?Just kidding. Post your BIOS settings using template and then we'll see.
BTW, are you using CPU LLC and/or QPI LLC?
are you using CPU LLC ? Yes 50%
and QPI LLC? Yes
I wanted to get around 4Ghz stable, but after i saw how C-States affect my Memory Benchmark i was a bit like, what the hell. I even wanted to keep C-States on cause sometimes i just surfing around and with C-States on it keeps my idle power consumption and temps down. But the issue with 21x was that when i played old games like System Shock 1 via Dosbox, the Turbo (22x on one core) kicked in and the rig was running around 4,2Ghz but it was unstable, so i got 0x101 (V-Core) BsoDs or the game was closed abnormally, but if i only got 21x Multi everything was fine, 25x LinX, 6h Small FFT P95 and this has kept me to the decission that i have to do something to optimize that issue.Code:Target CPU Frequency 4060MHz Target DRAM Frequency 1627MHz LN2 Mode Disabled QPI Loadline Calibration Enabled Sync Mode [Enabled] AI Overclock Tuner [Manual] OC From CPU level Up [Auto] CPU Ratio Setting [Auto] CPU Turbo Power Limit [Disabled] >CPU Configuration---------------------------- CPU Ratio Setting [Auto] C1E Support [Enabled] Hardware Prefetcher [Enabled] Adjacent Cache Line Prefetcher [Enabled] Intel(R) Virtualization Tech [Enabled] CPU TM Function [Enabled] Execute Disable Bit [Enabled] Intel(R) HT Technology [Enabled] Active Processor Cores [All] A20M [Disabled] Intel(R) SpeedStep(TM) Tech [Enabled] Intel(R) C-STATE Tech [Enabled] C State package limit setting [Auto] ---------------------------------------------- BCLK Frequency [203] PCIE Frequency [101] DRAM Frequency [DDR3-1627Mhz] UCLK Frequency [3256Mhz] QPI Link Data Rate [7326MT/s] Memory Configuration Protect [Disabled] >DRAM Timing Control-------------------------- CAS# Latency [7 DRAM Clock] RAS# to CAS# Delay [7 DRAM Clock] RAS# PRE Time [7 DRAM Clock] RAS# ACT Time [24 DRAM Clock] RAS# to RAS# Delay [Auto] REF Cycle Time [Auto] WRITE Recovery Time [Auto] READ to PRE Time [Auto] FOUR ACT WIN Time [Auto] Back-To-BackCAS# Delay [Auto] Timing Mode [1N] Round Trip Latency on CHA [Auto] Round Trip Latency on CHB [Auto] Round Trip Latency on CHC [Auto] WRITE To READ Delay(DD) [Auto] WRITE To READ Delay(DR) [Auto] WRITE To READ Delay(SR) [Auto] READ To WRITE Delay(DD) [Auto] READ To WRITE Delay(DR) [Auto] READ To WRITE Delay(SR) [Auto] READ To READ Delay(DD) [Auto] READ To READ Delay(DR) [Auto] READ To READ Delay(SR) [Auto] WRITE To WRITE Delay(DD) [Auto] WRITE To WRITE Delay(DR) [Auto] WRITE To WRITE Delay(SR) [Auto] ---------------------------------------------- CPU Differential Amplitude [Auto] CPU Clock Skew [Auto] IOH Clock Skew [Auto] ------------ Extreme Engine Digi+ ------------ Digi+ PWR Mode [T-Balanced] PWR Volt. Control [Auto] Load-Line Calibration [50% Calibration] CPU Voltege OCP [Enabled] CPU PWM Frequency [Auto] Extreme OV [Disabled] Extreme OC [Mode 1] CPU Voltage [1.33750] CPU PLL Voltage [1.40450] QPI/DRAM Core Voltage [1.35000] DRAM Bus Voltage [1.68275] >DRAM REF Voltages---------------------------- DRAM DATA REF Voltage on CHA [Auto] DRAM CTRL REF Voltage on CHA [Auto] DRAM DATA REF Voltage on CHB [Auto] DRAM CTRL REF Voltage on CHB [Auto] DRAM DATA REF Voltage on CHC [Auto] DRAM CTRL REF Voltage on CHC [Auto] ---------------------------------------------- IOH Voltage [1.17925] IOH PCIE Voltage [1.51050] ICH Voltage [1.11300] ICH PCIE Voltage [1.51050] ---------- Spread Spectrum Control ----------- CPU Spread Spectrum [Disabled] PCIE Spread Spectrum [Disabled] ***on-board jumper dependant
Try it i a moment hold on
Damn coulnd't test it only have a Connector C joint
but looked like the OC Station Connector have 10 Pins instead of 8-9 like USB
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