Originally Posted by NathObeaN
Reason? Other than lower voltage of course.
Triple channel IMC controlled ram is hardly bandwidth starved. Lower latency achieved by tight timings is much better than high Mhz loose timings such as CL9
Reason? Other than lower voltage of course
Triple channel IMC controlled ram is hardly bandwidth starved. Lower latency achieved by tight timings is much better than high Mhz loose timings such as CL9
Reply With Quote
Bookmarks