X48 Rampage Formula Preview.

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I thought that I've seen it all with BIOS 0902 but I missed the best part. If you 're using the 3/4 divider it doesn't matter what Ai Clock Twister setting that you use in the BIOS because it's always the same bandwidth so I thought why not try Ai Clock Twister Lighter.

Did you ever see a Q9650 running Prime95 Blend stable at 4.05GHz and DDR 1199MHz with tRD 6 and tREF at 16383 with these voltages.

Ai Overclock Tuner [Manual]
CPU Ratio Setting [9.0]
FSB Strap to North Bridge [400MHz]
FSB Frequency [450MHz]
PCIE Frequency [100MHz]
DRAM Frequency [1199MHz]
DRAM Command Rate [2N]
DRAM CLK Skew on Channel A/B [Auto]
DRAM TimingControl [Auto]
DRAM Static Read Control [Disabled]
Ai Clock Twister [Lighter]
Ai Transaction Booster [Manual]
Common Performance Level [06]
Pull-In of CH A/B all disabled
CPU Voltage [1.30000V]
CPU PLL Voltage [1.50V]
North Bridge Voltage [1.27V]
DRAM Voltage [1.80V]
FSB Termination Voltage [1.20V]
South Bridge Voltage [1.05V]
SB 1.5V Voltage [1.50V]
Loadline Calibration [Disabled]
CPU GTL Voltage Reference [0.63X]
NB GTL Voltage Reference [0.67X]
DRAM Controller Voltage REF [Auto]
DRAM Channel A/B Voltage REF [Auto]
CPU Spread Spectrum [Disabled]
PCIE Spread Spectrum [Disabled]
CPU Clock Skew [Delay 300ps]
NB Clock Skew [Delay 200ps]

Don't be afraid to use more CPU and NB Clock Skew Delay because these are the most important settings in the BIOS to obtain stability with low voltage. A delay difference of 100ps between the CPU and the NB is necessary. Without the delay difference it's impossible to keep it stable with low voltage.

Disabling DRAM Static Read also gave me a small bandwidth increase so I've got better performance and lower voltage than with my old settings. Using Ai Clock Twister Lighter didn't only make it possible to use lower NB Voltage, it also makes it possible to use lower FSB termination Voltage.