Ohh thanks, those results look like single socket vs. dual channel.
Do you really have all four channels populated and ran with 12 threads? Beside that with six cores sharing two channels this benchmark is heavi imc speed limited. My 955be and also the AII 240 and 250 get best results if the nb runs one notch below the cpu. I hit a limit once the nb speed reaches 2xmem speed, so the optimum with ddr3 1333 is 2.8GHz/2.6GHz cpu/nb. If it's the same with DDR2 you should not be limited by the stock nb speed however since it's already above 1.6GHz.
Beside that I think only this ES has unlocked multis and voltages and the retail chips will be locked so using k10stats or similar to modify these settings on the chips msr register will not work and oc capability will be limited by the max possible ref HT the boards will offer.
@s7: I'm curious, what msr register did you modify? Was it the controll register or the p-state-0 register?





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