Hi Guys,

I appreciate this thread and not to mentioned simps' awesome guide (thx for that, dude - did 20 Mhz FSB more from 470 to 490 stable with your work).
I've a Q6600er G0 and want to buy a Q9650in a short time, but first I wanted to test the M2F. Normally I run this couple with 4x2Gbs 8500er Dominators from Corsair by 3,2 Ghz / 4*800 and 1.27V VC, 1.5V PLL, 1.1V NB, 1.1V VTT, 1.5V/1.1V SB with CPU/NB GTLs all +30mV rock stable - rest auto.

Bios 1307


This is the Setup for 490:

Extreme Tweaker
Ai Overclock Tuner : Manual
OC From CPU Level Up : AUTO
CPU Ratio Control : Manual
- Ratio CMOS Setting : 6
FSB Frequency : 490
CPU Clock Skew : Delay 100ps
North Bridge Clock Skew : Delay 300ps
FSB Strap to North Bridge : 333
DRAM Frequency: DDR2-980
Dram Clock Skew CH1 A1 : Delay 50ps
Dram Clock Skew CH1 A2 : Delay 50ps
Dram Clock Skew CH1 B1 : Delay 50ps
Dram Clock Skew CH1 B2 : Delay 50ps


DRAM Timing Control: Manual
CAS# Latency : 5
RAS# to CAS# Delay : 5
RAS# Precharge : 5
RAS# ActivateTime : 15
RAS# to RAS# Delay : Auto
Row Refresh Cycle Time : Auto
Write Recovery Time : Auto
Read to Precharge Time : Auto

Read to Write Delay (S/D) : Auto
Write to Read Delay (S) : Auto
Write to Read Delay (D) : Auto
Read to Read Delay (S) : Auto
Read to Read Delay (D) : Auto
Write to Write Delay (S) : Auto
Write to Write Delay (D) : Auto

Write to PRE Delay : Auto
Read to PRE Delay : Auto
PRE to PRE Delay : Auto
ALL PRE to ACT Delay : Auto
ALL PRE to REF Delay : Auto

[like bios shows]

DRAM Static Read Control: Disabled
Dram Read Training : Disabled
MEM OC Charger : Enabled
Ai Clock Twister : Moderate
Transaction Booster : Manual

Common Performance Level [8]

Pull-In of CHA PH1 Disabled
Pull-In of CHA PH2 Disabled
Pull-In of CHA PH3 Disabled
Pull-In of CHA PH4 Disabled
Pull-In of CHA PH5 Disabled
Pull-In of CHB PH1 Disabled
Pull-In of CHB PH2 Disabled
Pull-In of CHB PH3 Disabled
Pull-In of CHB PH4 Disabled
Pull-In of CHB PH5 Disabled

PCIE Frequency : 100

CPU Voltage : 1.24
CPU PLL Voltage : 1.57
FSBT : 1.37
DRAM Voltage : 1.8
North Bridge Voltage : 1.4
South Bridge Voltage 1.5 : 1.5
South Bridge Voltage 1.1 : 1.1

CPU GTL Reference 0 : -25mV
CPU GTL Reference 1 : 20mV
CPU GTL Reference 2 : -25mV
CPU GTL Reference 3 : 20mV
North Bridge GTL Reference : +30mV
DDR2 Channel A REF Voltage : 12.5mV
DDR2 Channel B REF Voltage : 12.5mV
North Bridge DDR Reference : 25mV

Load Line Calabration : Enabled
CPU Sread Spectrum : Disabled
PCIE Spread Spectrum : Disabled


It's small, large, custom FFT and blend stable.

Now my case:

I hit with ease 500 FSB, but it crashes alway by about 10-15 minutes large fft or blend. If I bump 2 or 3 steps the voltages, same results. GTLs in Simps' green sectors didn't work, in fact -25/20 is my most stable setup.

Temps are all normal and good ... NB goes not over 55 °C in the stress tests.

Any hints ?

Thx

Keep up the good work !