X48 Rampage Formula Preview.

[mikeyakame]

There's only one doubt to be removed; supercool your cpu/nb and see if you still fail linx, then you'd be able to tell if it's heat/voltage or a timing issue. Linx will stress your (total) system more than MCI memtest ever could. As you can see from the ss you provided, your cpu isn't working as hard. With linx all your components are operating at full power, even the integrity of your power supply comes into play.

It's like talking to a brick wall

Linpack calculation errors like in his pic are more than likely CPU GTL1/2 or NB GTL related, I've told him this too. Since CPU GTL1/2 can't be adjusted seperate of CPU GTL0/3, he is screwed basically so he needs to back off settings till its stable.

CPU GTL1/2 wants to be high, CPU GTL0/3 wants to be low, you can't dial both in low and expect stability, only other alternative is raising Vtt and balancing it out.

I can replicate those type of Linpack errors on my DFI board simply by changing GTLs by as little as 0.0008v sometimes, and this means one of two things. First most likely my Vtt needs some minor adjustment, or second I've found where the max or min threshold for logic receiver GTL sampling lies.

You can't test GTLs with a tight PL as well, need to be done with at least PL-2 lower than aimed. That way takes strain off MCH, and if Vnb was too low it won't trash your results. CPU multi should be dropped as well by 1 or 2x. To give a frequency that'll work on VID for testing.

A-Grey, your Vtt is too low to use 0.63x CPU0/1/2/3. I use the following at 425fsb on my Q9550, 3.61ghz, PL7.

Vcc = 1.21v, Vtt = 1.19v, Vnb = 1.39v, CPU GTL1/2 = 101 (~0.6665x), CPU GTL0/3 = 87 (~0.648x), NB GTL = 81 (~0.662x). On top of these i use MCH Vref1-3 and MCH Slew Rate Offset which are MCH registers for compensating insufficient circuit resistance. Basically they give additional resistor impedance adjustment within a limited range, for circuit level slew rate/voltage crossing point correction, when at higher FSB both voltage noise and clock jitter/shifting/skewing gradually get worse and require compensation at logic receiver to bring them back within limits.