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  1. #2226
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    Quote Originally Posted by A-Grey View Post
    That's .

    Good work.

    You can try to lower some voltages now.
    Or go higher on ram, what wouldn't be a bad option.
    But first I need to get some fan to throw some fresh air on MEM cuz they are gettin' pretty hot while benching.

    BTW: Does MemSet save Clock Fine Delays too?

    EDIT: BIOS 803 still doesn't let set tREF or did I miss something?
    Last edited by kuebk; 05-03-2009 at 06:54 AM.
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  2. #2227
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    Quote Originally Posted by kuebk View Post
    Or go higher on ram, what wouldn't be a bad option.
    But first I need to get some fan to throw some fresh air on MEM cuz they are gettin' pretty hot while benching.

    BTW: Does MemSet save Clock Fine Delays too?
    No. You have to use Bar_Edit for that. I don't know what registers you have to save and load to do that.

    I think that mikeyakame or SoLoR knows how to do that.

  3. #2228
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    Quote Originally Posted by A-Grey View Post
    No. You have to use Bar_Edit for that. I don't know what registers you have to save and load to do that.

    I think that mikeyakame or SoLoR knows how to do that.
    I know the register offsets which hold these values, and I can explain the few that I've worked out, but I still cant for the life of me figure out the method for obtaining the actual fine delay in PS for each DLL table entry. I've worked out where I think fine delay ps bitmask is, and where some of the manually input phase degree offsets are set. I still can't get consistent results reversing the register values though.

    I've run out of ideas on how to get the correct reverse data from the bitmasks/hex value. I believe I am missing the key element to how they are input by Intel, all I've got is educated assumptions to work with.

    DFI LT-X48-T2R UT CDC24 Bios | Q9550 E0 | G.Skill DDR2-1066 PK 2x2GB |
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  4. #2229
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    Quote Originally Posted by mikeyakame View Post
    I know the register offsets which hold these values, and I can explain the few that I've worked out, but I still cant for the life of me figure out the method for obtaining the actual fine delay in PS for each DLL table entry. I've worked out where I think fine delay ps bitmask is, and where some of the manually input phase degree offsets are set. I still can't get consistent results reversing the register values though.

    I've run out of ideas on how to get the correct reverse data from the bitmasks/hex value. I believe I am missing the key element to how they are input by Intel, all I've got is educated assumptions to work with.
    All he needs is the register offsets that hold the DRAM Clock Fine Delays to know what register to save in BAR_Edit so he can load them automatically at next boot to always have the same value.

    This probably works very well when you don't have a dual boot configuration with Linux like I have.

  5. #2230
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    Quote Originally Posted by kuebk View Post
    EDIT: BIOS 803 still doesn't let set tREF or did I miss something?
    No, you didn't miss anything.
    ASUS thinks that we don't need it.

  6. #2231
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    Quick one:

    I've got some:
    2x2gb OCZ Reaper 1150mhz
    Q6600 G0 VID 1.325 ( Watercoolerd)
    9800GTX ( maybe a future Crossfire or GTX275)

    I want to squeeze 3.8ghz minimum, of my Q66. In water.

    Rampage Formula or P5Q deluxe?
    For 20 bucks of diference, Crossfire 16/16, LCD display (really useful) Reset BIOS button, STALKER...
    Worth it?

    or would de p5q be more easy to get 3.8 or beyond?
    Raidmax ATOMIC - Core i7 3770s + Corsair H70 // Gigabyte H77N WIFI // Corsair Vengeance 2x4GB 2133mhz // EVGA GTX1060 ACX2.0// Kingston SUV400 480Gb // Sharkoon SFX500L

  7. #2232
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    Quote Originally Posted by miptzi View Post
    Quick one:

    I've got some:
    2x2gb OCZ Reaper 1150mhz
    Q6600 G0 VID 1.325 ( Watercoolerd)
    9800GTX ( maybe a future Crossfire or GTX275)

    I want to squeeze 3.8ghz minimum, of my Q66. In water.

    Rampage Formula or P5Q deluxe?
    For 20 bucks of diference, Crossfire 16/16, LCD display (really useful) Reset BIOS button, STALKER...
    Worth it?

    or would de p5q be more easy to get 3.8 or beyond?
    When you've got a Q6600 that can run at 3.8GHz it doesn't matter if you buy the Rampage Formula or the P5Q Deluxe. It should run at 3.8GHz on both these boards.

    Choose the board that you like the most.

  8. #2233
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    Quote Originally Posted by A-Grey View Post
    When you've got a Q6600 that can run at 3.8GHz it doesn't matter if you buy the Rampage Formula or the P5Q Deluxe. It should run at 3.8GHz on both these boards.

    Choose the board that you like the most.
    Anyway I would go for Rampage Formula.
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  9. #2234
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    Quote Originally Posted by A-Grey View Post
    All he needs is the register offsets that hold the DRAM Clock Fine Delays to know what register to save in BAR_Edit so he can load them automatically at next boot to always have the same value.

    This probably works very well when you don't have a dual boot configuration with Linux like I have.
    Problem is you can't just change those values on their own.

    Channel 1 DLL fine delays
    FED14500 00000000 00000000 00004577 0000B033
    FED14510 0000BB4A 00000062 00000940 00000018
    FED14520 00002016 0000020A 00001B01 00000000
    FED14530 00003332 00000924 00000924 00000800

    Channel 2 DLL fine delays
    FED14900 00000000 00000000 00002566 00009B11
    FED14910 0000CC4A 00000C3E 000005EB 0000001A
    FED14920 000004B4 0000020B 00001B01 00001121
    FED14930 00003432 00000924 00000924 00000C00

    The bold/underline are fine control delay/fine clock delay.
    The underline are registers of interest for possibly phase degree offset.

    DFI LT-X48-T2R UT CDC24 Bios | Q9550 E0 | G.Skill DDR2-1066 PK 2x2GB |
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  10. #2235
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    Is anyone running any 2x1gb kit @ 600mhz? If so I would be pleased to get screenshot with factory spd/timings as long with your current timings.

    Want to compare which timings I could lower instead of trial 'n' error whole week. :p

    Especially I'm interested into tRFC.

    EDIT: Started the fight with timings, so far I've lowered the PL to 6, and Prime95 blend goes pretty good but also my ram gets pretty hot.

    A-Grey how hot is your ram while benching? Do you have additional fan to cool ram?

    Last edited by kuebk; 05-03-2009 at 02:11 PM.
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  11. #2236
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    Quote Originally Posted by mikeyakame View Post
    Problem is you can't just change those values on their own.

    Channel 1 DLL fine delays
    FED14500 00000000 00000000 00004577 0000B033
    FED14510 0000BB4A 00000062 00000940 00000018
    FED14520 00002016 0000020A 00001B01 00000000
    FED14530 00003332 00000924 00000924 00000800

    Channel 2 DLL fine delays
    FED14900 00000000 00000000 00002566 00009B11
    FED14910 0000CC4A 00000C3E 000005EB 0000001A
    FED14920 000004B4 0000020B 00001B01 00001121
    FED14930 00003432 00000924 00000924 00000C00

    The bold/underline are fine control delay/fine clock delay.
    The underline are registers of interest for possibly phase degree offset.
    It doesn't matter if you can't change the value. You can change them with DRAM CLK Skew in the BIOS and once you've found the right DRAM Clock Fine Delays you can save those register offsets in BAR_Edit.

  12. #2237
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    Quote Originally Posted by kuebk View Post
    Is anyone running any 2x1gb kit @ 600mhz? If so I would be pleased to get screenshot with factory spd/timings as long with your current timings.

    Want to compare which timings I could lower instead of trial 'n' error whole week. :p

    Especially I'm interested into tRFC.

    EDIT: Started the fight with timings, so far I've lowered the PL to 6, and Prime95 blend goes pretty good but also my ram gets pretty hot.

    A-Grey how hot is your ram while benching? Do you have additional fan to cool ram?
    The Thermal Sensor Cable connected to OPT2 is measuring my memory temperature. I've got a 250mm side panel fan that blows fresh air to my memory. This gives me a temperature drop around 8-10 degrees Celsius.
    The temperature of my memory is around 30-35 degrees Celsius under full stress with the side panel fan.

    If you want to cool your memory take a look at this memory cooler from OCZ.

  13. #2238
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    Quote Originally Posted by A-Grey View Post
    The Thermal Sensor Cable connected to OPT2 is measuring my memory temperature. I've got a 250mm side panel fan that blows fresh air to my memory. This gives me a temperature drop around 8-10 degrees Celsius.
    The temperature of my memory is around 30-35 degrees Celsius under full stress with the side panel fan.

    If you want to cool your memory take a look at this memory cooler from OCZ.
    In Prime95 Blend the highest temp which I've seen was 45*C with 2.4v and without fan what comparing to your 30-35* with 1.8v and fan doesn't look very bad.
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  14. #2239
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    A-grey what divisor you use? and fsb strap you use?
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  15. #2240
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    Quote Originally Posted by kuebk View Post
    Is anyone running any 2x1gb kit @ 600mhz? If so I would be pleased to get screenshot with factory spd/timings as long with your current timings.

    Want to compare which timings I could lower instead of trial 'n' error whole week. :p

    Especially I'm interested into tRFC.

    EDIT: Started the fight with timings, so far I've lowered the PL to 6, and Prime95 blend goes pretty good but also my ram gets pretty hot.

    A-Grey how hot is your ram while benching? Do you have additional fan to cool ram?
    I´m running some Kingston HyperX PC9600@600MHz (1200MHz effective) 555 15 tRD6 Strong DRAM Static disabled without any problem.

    I´m at work now so the only screenie I have with my settings is this, when I get home I can get you some more info.

    Asus P8Z68 Deluxe / i7 2600K / 2x4GB G.Skill RipjawsX 1600C8 / EVGA GTX 580 SC SLI

    Asus Crosshair V Formula-Z / FX8350 / G.Skill TridentX 2400C10 / GTX690

  16. #2241
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    There is a new BIOS available for the ASUS Rampage Formula.

    BIOS History

    [ 0902 ]
    ----------------------
    Support new CPUs. Please refer to our website at: http://support.asus.com/cpusupport/c...Language=en-us

    You can download BIOS 0902 here.

    This time the new BIOS release is faster than the reply on the mails that we've been sending to them.
    Last edited by Alien Grey; 05-04-2009 at 06:31 AM. Reason: BIOS History

  17. #2242
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    Quote Originally Posted by A-Grey View Post
    There is a new BIOS available for the ASUS Rampage Formula.

    You can download BIOS 0902 here.

    This time the new BIOS release is faster than the reply on the mails that we've been sending to them.
    Please tell me that they added tREF.
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  18. #2243
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    Quote Originally Posted by kuebk View Post
    Please tell me that they added tREF.
    Well tREF doesn't need to be adjustable option, rather they just need to write assembly function to self track DDR frequency automatically. Ie the value is changed when DDR frequency changes. THat's the correct way to handle it.

    Doubt Asus has done anything about it though, they are hesistant to copy working assembly code from other bios source packages to add features...Just imagine the likelyhood of having to actually write new source functionality, especially since the board has EOL'd some time ago. If its added then great though. My DFI bios does it properly, Asus just aren't bothered because it's not a huge deal. Correct tREF doesn't make a big difference, rather it just reduces the amount of bandwidth on the FSB that is utilized to fetch lost memory data if self refresh turnaround is too short. Reduces memory access through MCH a little too. It's more an optimization than a difference, but every little bit counts when it's wasted for no reason at all.
    Last edited by mikeyakame; 05-04-2009 at 12:46 AM.

    DFI LT-X48-T2R UT CDC24 Bios | Q9550 E0 | G.Skill DDR2-1066 PK 2x2GB |
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  19. #2244
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    Quote Originally Posted by kuebk View Post
    Please tell me that they added tREF.
    They didn't.

    There is no visual difference in the BIOS.

  20. #2245
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    Quote Originally Posted by A-Grey View Post
    They didn't.

    There is no visual difference in the BIOS.
    Nor didn't add A1/A2/B1/B2 skews?
    e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex

    mems: vitesta ee+ 800@1200 cl5 2.4v

  21. #2246
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    Quote Originally Posted by kuebk View Post
    Nor didn't add A1/A2/B1/B2 skews?
    No, they didn't.

  22. #2247
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    Exclamation

    The problem with the DDR +1200MHz seems to be fixed in this BIOS.

    No need to Delay DRAM CLK Skew on Channel B with 50ps to run Linx stable at 8 X 465MHz, DDR 1239MHz and tRD 6.

    This is great.

    Let's see if it can stay stable now. When this can be done and someone can confirm with a Q9650 that he can run it stable now with DDR +1200MHz and tRD 6 we're back in business and maybe take the lead.
    Last edited by Alien Grey; 05-04-2009 at 06:39 AM.

  23. #2248
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    It seems they locked setting of skews with bar_edit in this bios 0902 (or maybe address got changed ?), also it breaks old OC profiles.

  24. #2249
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    I am tempted to flash my Maximus Formula with the Rampage Formula BIOS. What gains would there be?

  25. #2250
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    Quote Originally Posted by SoLoR View Post
    It seems they locked setting of skews with bar_edit in this bios 0902 (or maybe address got changed ?), also it breaks old OC profiles.
    uhm,does that mean the Clock Skew settings are not available anymore in the new BIOS?

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