AMD Bulldozer pushed out to 2011

[largon]

If things are as you two claim, then why did an AMD spokesperson speak to X-Bit Labs about these issues on Thursday?

Help me out and point me these issues.

“Our guidance for the Bulldozer CPU core was reset to expect test silicon in late 2010 and product in 2011,” said Damon Muzny, a spokesperson for AMD

Xbitlabs, 05/03/2009

No discernable difference to Meyer's statement, 5 days before:

Dirk Meyer, chief executive of Advanced Micro Devices, said Friday the chipmaker plans to "ramp up" production of next-generation 32-nanometer processors in the middle of next year with volume production starting in the fourth quarter.

InformationWeek, 27/02/2009

"ramp up production of next-generation 32-nanometer processors in the middle of next year" = ES in late 2010. What's "late 2010"? 3Q10? 4Q10? Not hard to deduct, considering what their CEO said, mere days before.
"volume production starting in the fourth quarter" = product in 2011. Just like the roadmap from AD08.

[Shintai]

The last roadmap is pretty useless. Its the same type TSMC uses. In short we should have had 40nm GPUs over a one and a half year now then. You have to add atleast a year to those dates.

[largon]

^You are saying Deneb will be available starting from 2Q09?

[Shintai]

^You are saying Deneb will be available starting from 2Q09?

Is the processorroadmap the last one in your post? Or is it the processnode one?



Whats also worrying is that the Global Foundry Company will move to generic process nodes.

But I do hope we see 32nm GPUs and CPUs from them in early 2011.

[mAJORD]

What's wrong with that (TSMC) roadmap?

RH edge = complete, no?

[ILikeCosmosS]

this may not relate to bulldozer but i found a article that amd and partners are ahead against intel in creating the first 22nm chip
http://www.tomshardware.com/news/amd...ntel,6175.html

sandy and ivy bridge will be tuff to beat for amd until they get to 32nm

[Shintai]

What's wrong with that (TSMC) roadmap?

RH edge = complete, no?

Complete=Start to install equipment. TSMCs roadmap is "adjusted" after end process development and node start. Issue is its when the factory is ready and you can make some chips etc. It would be like saying Intel would ship 32nm today. Yet its half a year away.

45nm GS was completely abadoned underway due to problems for TSMC.

Its simply test runs and not what you would call full scale production. You can ofcourse make chips on it. Yield just aint pretty.

this may not relate to bulldozer but i found a article that amd and partners are ahead against intel in creating the first 22nm chip
http://www.tomshardware.com/news/amd...ntel,6175.html

sandy and ivy bridge will be tuff to beat for amd until they get to 32nm

Thats an SRAM chip and pretty small too. Just like TSMC they made a few Mbit SRAM chip. Intel made a 291Mbit SRAM chip with 2 billion transistors to compare. Its more PR than production.

[informal]

I will say this again,for the Shintai and co :
AMD won't introduce the new design on a brand new process node.This just won't happen.Period.
Hence,32nm will be "trained" on a Shanghai derivatives,cheap small and fast 4 and 6 core products,probably in H2 2010.After this comes Bulldozer,first in desktop variant aka Orochi. Between now and Orochi,AMD will have Istanbul,Sao Paolo,Magny Cours and 32nm shrank variants.

[Extelleron]

I will say this again,for the Shintai and co :
AMD won't introduce the new design on a brand new process node.This just won't happen.Period.
Hence,32nm will be "trained" on a Shanghai derivatives,cheap small and fast 4 and 6 core products,probably in H2 2010.After this comes Bulldozer,first in desktop variant aka Orochi. Between now and Orochi,AMD will have Istanbul,Sao Paolo,Magny Cours and 32nm shrank variants.

That may be so, but there is absolutely no indication from AMD that that is the case. You can't just assume that AMD will do what you think it is logical. They can't suddenly decide today that they will shrink K10 CPUs to 32nm and do it. It would have had to be something planned for years. However, AMD planned that they would launch Bulldozer (Sandtiger core) at 45nm, then in 2010-2011 they would shrink to 32nm with Orochi. Now Sandtiger has been cancelled and Orochi is the first Bulldozer-gen chip AND the first AMD 32nm chip. So it is very unlikely that they had planned a 32nm shrink of K10.

None of these chips that you mention can compete with Core 2 Quad (2007 chip) based on per-clock/per-core performance. Istanbul may be capable of competing with Nehalem EP if it clocks very well..... but it will not be an easy fight and the pricing will have to be low. AMD will have zero competition for Beckton in the 4P market. San Paolo is just Istanbul on the G34 socket, Magny Cours is a 12 core MCM of San Paolo that will likely come at low enough clocks that it can be beaten by Beckton anyway.

On the desktop, a 6-core Istanbul doesn't make much sense (though it would be nice to one as a higher-end alternative to Deneb) and won't help AMD much in a market where not many apps utilize more than 4 threads. And once again, there is no indication that we will see 32nm chips from AMD until 2011. On the desktop AMD will be stuck with Deneb, which isn't a bad chip but not one that can last AMD 2 years and not a chip that can compete against Nehalem in any way.

[informal]

Phenom II with DDR2 is on average around 3-6% slower than C2Q 45nm,and this is on desktop.. On servers Shanghai just kills it...
As for the 32nm comment and no K10.5 on that node comment from you,i disagree.They won't launch a new design on a new node,period.

[Extelleron]

Phenom II with DDR2 is on average around 3-6% slower than C2Q 45nm,and this is on desktop.. On servers Shanghai just kills it...
As for the 32nm comment and no K10.5 on that node comment from you,i disagree.They won't launch a new design on a new node,period.

Shanghai beats 45nm Yorkfield quads slightly in apps that access memory a lot. For 2P servers you can go either way really, both Intel/AMD offer good performance now. On 4P 6-core Dunnington beats AMD's offerings in general as it hides the memory latency with a large L3 cache.

The only reason AMD is competitive is because of the FSB/slow memory connection, however, both of which change with Nehalem EP/Beckton. On the server market Intel will pretty much have the market locked down once they get Nehalem parts out...

I don't disagree that AMD would like to have their first 32nm part with an existing architecture rather than a new one... I am disagreeing that such a part would have ever been planned. AMD expected Bulldozer to be out in 2009 @ 45nm... why would they plan K10 @ 32nm in 2010? And as I said, you can't just pull a 32nm shrink out of thin air....

[Vozer]

They won't launch a new design on a new node,period.

Hmm... but their latest official roadmap indicates that they will.

Do you have any proof to back what you said?

[informal]

@Extelleron

~20 men team was assigned for Brisbane shrink of Windsor core.They did the job fine and in record time.Granted G1 wasn't perf. braker due to L2 cache latency that was a bit higher than in F3,plus it had 512KB of L2 per core,but it was done quite easily and with very small R&D. Same think can happen with 32nm K10.5 shrink since AMD has already done it with Shanghai(they had 10 smaller teams all around the world designing and optimizing various parts of the MPU,thus cutting time considerably). As you can see from G2 and C2 examples,MPU shrink is not that hard thing to do,especially if it could help you a lot in understanding the node that you will use for your new generation uarchitecture. I hope you can see now how "Orochi" and "first 32nm CPU" doesn't go in the same sentence.

Hmm... but their latest official roadmap indicates that they will.

Do you have any proof to back what you said?

Their last roadmap is the vaguest of all.If you believe they will risk the company's future by launching a new design on a new process node,suit yourself.

[Extelleron]

@Extelleron

~20 men team was assigned for Brisbane shrink of Windsor core.They did the job fine and in record time.Granted G1 wasn't perf. braker due to L2 cache latency that was a bit higher than in F3,plus it had 512KB of L2 per core,but it was done quite easily and with very small R&D. Same think can happen with 32nm K10.5 shrink since AMD has already done it with Shanghai(they had 10 smaller teams all around the world designing and optimizing various parts of the MPU,thus cutting time considerably). As you can see from G2 and C2 examples,MPU shrink is not that hard thing to do,especially if it could help you a lot in understanding the node that you will use for your new generation uarchitecture. I hope you can see now how "Orochi" and "first 32nm CPU" doesn't go in the same sentence.



Their last roadmap is the vaguest of all.If you believe they will risk the company's future by launching a new design on a new process node,suit yourself.

Shanghai has been on AMD's roadmap since 2007, it is the natural shrink of Barcelona so of course it was planned. Now how long did it take for the design teams to take the Barcelona architecture and shrink it to 45nm? I don't know, perhaps not too long, but I am pretty sure it did not happen overnight. Same thing with Brisbane.

If AMD will launch a 32nm K10 part in 2010, the design work needs to be wrapping up right around now and be finished in a few months in order for the first parts to come back from fab by late 2009/early 2010. AMD received the first Shanghai parts in January 2008 I believe and showed working C0 chips in March. That allowed them to launch in 4Q 2008 with availability of desktop chips in 1Q 2009.

I just don't see AMD doing a shrink of a shrink and I don't see them having started design work on it earlier enough that the chip could be ready in time. And why would this part not appear on AMD's lineup if it existed?

[Helmore]

What if they would test bulldozer on their 45 nm. node first, but never release it at that node and then produce it on 32 nm. Might be a viable option for them. A reason for doing to could be that their Bulldozer design won't be finished until about a year from now and by the time they have a working chip on 45 nm. their 32 nm. is ready to roll. With that in mind they first test the architecture on 45 nm. to then release it at 32 nm. May seem odd to some, but it could work out pretty well.

EDIT: @ Extelleron, Barcelona was designed with its shrink to 45 nm. in mind and was probably optimized for that node from the very beginning. This may have even made the shrink to 45 nm. considerably easier.

[v_rr]

People are just predicting to much

For now AMD have a good lineup and is picking up steam on the market. H1 2009 looks fine to AMD despite world crisis. For H2 it will depend on how AMD and Intel make their releases. (AMD will have "Congo" platform, Puma V2 platform with Phenom II dual core and 6-core Instanbul). Also AMD have RV740,RV790, the new HD 4000 mobile and the new RD8xx and SB8xx with RV8xx DX_11 part by end year.

Also is fundamental for AMD the HD dv2 to launch this/next month and other comparable notebooks from other manufactures.

[terrace215]

Provided 'cos they asked them .What should they do,don't answer the question,even a stupid one?
The fact is this "news" has been known since November 2008,period. Xbitlabs not knowing it and having to ask ,again,is not my problem

Did you read the quote? Here it is again:

“Our guidance for the Bulldozer CPU core was reset to expect test silicon in late 2010 and product in 2011,” said Damon Muzny, a spokesperson for AMD, in a brief conversation with X-bit labs.

I trust you can look up the definition of "reset" yourself?

So, AMD thinks something just changed, even if its fans seek to pretend otherwise.

[Chad Boga]

Provided 'cos they asked them .What should they do,don't answer the question,even a stupid one?
The fact is this "news" has been known since November 2008,period. Xbitlabs not knowing it and having to ask ,again,is not my problem

Who said anything about it being your problem? NOTHING revolves around you.

And as terrace215 states, why is AMD "resetting", if nothing has changed?

Additionally I think Paul DeMone of Real World Tech article fame also had an appropriate answer when facing a similar response as yours:

http://aceshardware.freeforums.org/i...-t523-240.html

There is so much misfortune, f**kups, and general incompetence, both on the technical side and financial side, coming from AMD the last few
years it is hard for anyone but die hard fan-boys like yourself to keep it all straight. What are you going to do for a life when these clowns go
out of business?

[Hans de Vries]

Did you read the quote? Here it is again:

“Our guidance for the Bulldozer CPU core was reset to expect test silicon in late 2010 and product in 2011,” said Damon Muzny, a spokesperson for AMD, in a brief conversation with X-bit labs.

I trust you can look up the definition of "reset" yourself?

So, AMD thinks something just changed, even if its fans seek to pretend otherwise.

WAS reset a long time ago. Anounced at the November 2008 Analyst say.

Double confusion caused by Xbit labs. First they blunder by claiming that Bulldozer is near and coming in 2010:
http://www.xbitlabs.com/news/cpu/dis...s_in_2010.html

Instead of admitting their error they claim 3 days later that it's AMD which has rescheduled Bulldozer.....
http://www.xbitlabs.com/news/cpu/dis...s_to_2011.html

Both existing and new processor designs are being implemented on 32 nm


Regards, Hans

[Hans de Vries]

Additionally I think Paul DeMone of Real World Tech article fame also had an appropriate answer when facing a similar response as yours:

don't make me angry.

[informal]

WAS reset a long time ago. Anounced at the November 2008 Analyst say.

Double confusion caused by Xbit labs. First they blunder by claiming that Bulldozer is near and coming in 2010:
http://www.xbitlabs.com/news/cpu/dis...s_in_2010.html

Instead of admitting their error they claim 3 days later that it's AMD which has which rescheduled Bulldozer.....
http://www.xbitlabs.com/news/cpu/dis...s_to_2011.html

Both existing and new processor designs are being implemented on 32 nm


Regards, Hans

Exactly,qft.This was similar response I would use to answer Chad's and terrace's posts.

Oh and people don't use Paul's opinion as any credible source when it comes to amd vs intel debate.That dude is defending itanium(or anything made by intel) like it's his own chip design while it's obvious where that one is going to(same place where titanic went back in the day).

As ofr Xbit lab's blunders,this is not the first nor the last one they did. I expect many more in the years to come

[Chad Boga]

Oh and people don't use Paul's opinion as any credible source when it comes to amd vs intel debate.That dude is defending itanium(or anything made by intel) like it's his own chip design while it's obvious where that one is going to(same place where titanic went back in the day).

If it was obvious, then I doubt Intel would be bringing it to process parity with x86, nor have two teams working on future versions.

[informal]

If it was obvious, then I doubt Intel would be bringing it to process parity with x86, nor have two teams working on future versions.

Let's wait and see where they take it

[Shintai]

Itanium (Or rather VLIW/EPIC) is the long term future. Not x86/x64. Both Intel and MS agrees on it. And IA64 got a big momentum. 32nm IA64 might come before Gulftown aswell. (Itanium skipped 45nm).

Amount of software have exploded since 64bit came to the desktop. You can basicly get everything MS makes as IA64. Plus when you download regular software here and there you also usually see IA64 when you see x64 ports.

Its not taking over tomorrow. But its a winner in the long run.

Itanium will also now be platform compatible with Xeons.

[informal]

I was talking about specific Itanium design,not vliw architectures in general...