Hi Unclewebb![]()
here 2 screens on 45nm quad test on oc'ed @3600 .. 2 runs - clk modulation 50% and NO clk mod. (common state) - Speedstep/EIST - Disable
all the same as You tested on your's, probably same temperature (10~12C)drop on 50% down-clock.
also noticed that only Everest can register (partly?) this clock modulation only via its CPU (W) wattage / power usage field
just as i see - that dropping power draw ~ approx 50% during 50% clk. modulation state
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