X48 Rampage Formula Preview.

[mikeyakame]

I finally figured it out what is going on with this BIOS.

The problem is the DRAM Clock Fine Delays. They can change after a reboot. What probably happens is that if you advance with 300ps and get a DRAM Fine Delay of 0T after a reboot something gets messed up and instead of advancing 300ps the DRAM Clock Fine Delays get delayed 300ps resulting in 14T.

This explains why Prime95 fails sometimes after a reboot.

Something else that I found is that it is necessary to have tREF in the BIOS that is calculated according to Intel specs.
With a closer tREF used that I should use for my memory speed I can run Prime95 + UT2004 almost an hour before I run into a General Protection Fault.

What I did is make some screen shots and send them to my contact at ASUS. I hope they can figure out what is going wrong.

DO you mean Intel or Jedec specs?

Jedec is tREF = REFI[ns] / CK[ns].

Intel just sets register space according to JEDEC timing specs.

I've found that with tREF = 4171T for 1066mhz on my DFI board that it doesn't leak memory over time like the RF did. Well once I adjusted CLK and DQ drive strength it seems better. My memory use is idling about 10% lower than it was in Windows 7 with the RF.

By the way FELIX amended Memset with auto tREF timing value according to frequency and it works great! I don't know if its public yet, but if you want a copy let me know and i'll email you it

Oh also the broken DRAM clock fine delay timings are the same since god knows what bios heh. That is the exact same problem I was complaining about to you a while back It changes on its own with no reason what so ever I have to keep advancing skew between resets. Thats the reason I asked Asus if they could have a read out of current skews in bios so we can tell when they are broken so we can adjust them heh. It's one thing being broken if they can't fix it, at least if we have a read out in bios we can know when to fix it without nuking our system or stability.