X48 Rampage Formula Preview.

[xr1140]

Rampage Formula BIOS 802, Intel Q9550 C1 @ 4.01Ghz, Mushkin Ascent 4x2Gb XP2-8500 (996619) cooled with a ZEROThrem FZ120 in a Antec P180 case. I didn`t had much time to stress it to the limit. I hope I have some time for some IntelBurnTest tomorrow.

Idle - 43 grade
Fulload (Prime95) - 65-68grade

ASUS Rampage Formula BIOS 0802 Template 

*Extreme Tweaker* 
Ai Overclock Tuner               [Manual] 
CPU Ratio Setting                [08.5] 
FSB Strap to North Bridge        [333Mhz] 
FSB Frequency                    [470] 
PCIE Frequency                   [100] 

DRAM Frequency                   [DDR2-941MHz] 
DRAM Command Rate                [2N] 
DRAM CMD Skew on Channal A       [Greyed Out] 
DRAM CMD Skew on Channal B       [Greyed Out] 
DRAM CLK Skew on Channal A       [Advance 300ps] 
DRAM CLK Skew on Channal B       [Advance 300ps] 

DRAM Timing Control              [Manual] 
 1st Information 
  CAS# Latency                   [5] 
  RAS# to CAS# Delay             [5] 
  RAS# PRE Time                  [5] 
  RAS# ACT Time                  [15] 
  RAS# to RAS# Delay             [3] 
  REF Cycle Time                 [50] 
  WRITE Recovery Time            [6] 
  READ to PRE Time               [3] 
 2nd Information 
  READ to WRITE Delay (S/D)      [8] 
  WRITE to READ Delay (S)        [3] 
  WRITE to READ Delay (D)        [5] 
  READ to READ Delay (S)         [4] 
  READ to READ Delay (D)         [6] 
  WRITE to WRITE Delay (S)       [4] 
  WRITE to WRITE Dealy (D)       [6] 
 3rd Information 
  WRITE to PRE Delay             [14] 
  READ to PRE Delay              [5] 
  PRE to PRE Delay               [1] 
  ALL PRE to ACT Delay           [6] 
  ALL PRE to REF Delay           [6] 

DRAM Static Read Control         [Enabled] 
Ai Clock Twister                 [Light] 
Ai Transation Booster            [Manual] 
  Common Performance Booster     [8] 

  Pull-In of CHA PH1             [Disabled] 
  Pull-In of CHA PH2             [Disabled] 
  Pull-In of CHA PH3             [Disabled] 
  Pull-In of CHA PH4             [Disabled] 
  Pull-In of CHA PH5             [Disabled] 
  Pull-In of CHA PH6             [Disabled] 
  Pull-In of CHB PH1             [Disabled] 
  Pull-In of CHB PH2             [Disabled] 
  Pull-In of CHB PH3             [Disabled] 
  Pull-In of CHB PH4             [Disabled] 
  Pull-In of CHB PH5             [Disabled] 
  Pull-In of CHB PH6             [Disabled] 

CPU Voltage                      [1.3000]	real 1.288 
CPU PLL Voltage                  [1.50]		real 1.552
North Bridge Voltage             [1.33]		real 1.2
DRAM Voltage                     [2.00]		real 2.0
FSB Termination Voltage          [1.30]		real 1.32
South Bridge Voltage             [1.05]		real 1.056
SB 1,5V Voltage                  [1.50]		real 1.502
Loadline Calibration             [Enabled] 
CPU GTL Voltage Reference        [0.63x] 
NB GTL Voltage Reference         [0.67x] 
DRAM Controller Voltage REF      [AUTO] 
DRAM Channel A Voltage REF       [AUTO] 
DRAM Channel B Voltage REF       [AUTO] 

CPU LED Selection                [CPU Voltage] 
NB LED Selection                 [North Bridge Voltage] 
SB LED Selection                 [South Bridge Voltage] 
Voltiminder LED                  [Enabled] 

CPU Spread Spectrum              [Disabled] 
PCIE Spred Spectrum              [Disabled] 
CPU Clock Skew                   [Delay 100ps]
NB Clock Skew	                 [Normal]


*Advanced settings* 
CPU Ratio Setting                [08.5] 
C1E Support                      [Disabled] 
CPU TM Function                  [AUTO] 
Vanderpool Technology            [Enabled] 
Execute Disable Bit              [Enabled] 
Max CPUID Value Limit            [Disabled] 
Intel(R) SpeedStep (TM) Tech.    [Disabled]

CPU-Z Validation