I had a couple of questions back on my post #4644, and have a couple more, if someone wants to take a shot at them.

Is there any real benefit to enabling the Static Read Control?

What's the final verdict on the operation/options for CPU Margin Enhancement?

The lower FSB Strap to North Bridge performs better on other boards, is there a specific reason most of you are leaving it AUTO on the P5Q?

I keep seeing a recommendation of 55 for the Row Refresh Cycle Time, again is there a specific reason to leave it loose on the P5Q?