Quote Originally Posted by DemonEyez View Post

It's best to not set vNB and vCPU PLL the same voltage. There needs to be a gap between these two, or they'll interfere witch each other causing instability for the North Bridge.
So up your SB Core/CPU PLL Voltage or lower NB Core Voltage. I would prefer the latter. Take in account that - idealy - CPU PLL voltage is set 0.3v to 0.4v above vCC (=vcore)
You are probably right but I've never found an instability problem with any of my DFI boards right back to the ICFX 3200 which was one of the first boards with GTL, VTT & PLL features.

My P35 has run for nearly a year with 1.55v pll & 1.57vnb.

I wouldn't recommend upping the PLL either for 24/7 use, I've hurt plenty CPU's max fsb using high PLL voltage.

My board/chip is running prime stable at 533fsb with 1.55 vpll & 1.25 CPU vcore. The same chip has run for a couple of months @ 475 x 9.5 1.55vpll @ 1.4vcore.

Ideally Intel don't want there 45nm's going past 1.25v but I guess when you overclock best intentions & ideals go out the window.

CN