Real Temp - New temp program for Intel Core processors

[rge]

Given IR reading of E8400 casing is 95C at DTS=0, and now that intel has finally provided tjmax, we finally know the temp gradient is approximately 5C from tjunction to casing at idle, undervolted, at least in cases where there is a solder attach adhesive like E8xxx, (maybe slightly more for adhesive attach), though there are other variables which we can not account for completely. But given both E8400 and Q6600 has solder attach (solder attach is ~50W*M/K from same intel slides that show solder attach melting point at ~220C if memory serves correctly), I would guess same ~5C gradient for Q6600 exists as well, which would make it 100 tjmax, since IR casing was 95C at DTS=0. Same for E6850, etc. Saw Unclewebb was talking about changing many of those at 95 back to 100, would assume for that reason. The adhesive attach thermal conductivity is several times lower, so dont know if > 5C exists for those, even if all other variables same.

Edit: Also if Q6600 GO was 100, not only would it have similar 5C gradient die to casing temp at idle, undervolted state, but also the same 30C difference from Tcase max to tjunction max as all the 45nm quads, though granted that is a completely different nm process. So would the Q6600 B stepping then be 90 tjmax (5 C more than IR measurement at idle, undervolted, and 28C more than tcase max...

Well intel solved one small issue with 45nm, but clearly the arguing about 65nm tjmaxs will continue