**Official DFI LanParty UT X48-T2R(and LT) Discussion

[C-N]

Setting the improper DDL Mode can definitely result in a no-boot condition. Each mode changes timing tables, skews and waveform shaping for particular memory ICs and capacitive and resistive loading of the PCB.

Not sure why you guys are having problems with DS/DDS latching the values entered. Works fine on the boards I've tested so far.

I've found a good use for these additional settings. Most of you guys will remember starting with the P35 on, it was a struggle to get Cell Shock PC2 8000 to run on these boards. Regardless of timings or voltage 1050-1080 was about max. With these settings unlocked I've got them running at 1200/5-5-5-15, 2.066 volts measured on the UT X48. Will get some screenshots posted up in the next day or so.

Hey Praz do you think these new features will find themselves onto the P35 BIOS or do you think the P35's ship has sailed?

CN