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Thread: AMD 45nm Deneb Pictures, CPU-Z and Super Pi Results

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  1. #10
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    Join Date
    Dec 2007
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    66
    Quote Originally Posted by 0g1 View Post
    What I dont understand is, why AMD can only get HT to run at 2-2.2 Ghz and therefore their L3 Cache speed. Meanwhile Intel can run Nehalem L3 at the CPU speed ... 3.2Ghz+ ... and their L1 and L2 caches seem to have lower latency as well. Their L2 cache is lower latency than Core 2's, thus why its Super Pi scores are so good. Seems AMD's cache speeds have been the same for about 5 years, ever since A64 first came out. Meanwhile, Intel's have been improving very rapidly since the P4.
    Power budget limitations would be my guess, they seem obsessive about performance per watt over simply raw performance numbers. The SRAM cells are identical between Phenom's level 2 and 3 caches so it seems unlikely they're causing the limitation, that said I can recall JumpingJack suggesting AMD's 65nm process may have issues with excessive wire delay which would impact on level 3 cache.

    I wonder if AM3 will see a boost in northbridge clockrate as an enticement to upgrade. The 1.8GHz clock in the enginering sample might be simply to maintain AM2+ compatability, or maybe thats just wishfull thinking... (?)
    Last edited by _Lone_Wolf_; 07-13-2008 at 05:26 AM. Reason: Spelling....

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