Quote Originally Posted by _Lone_Wolf_ View Post
Wouldn't this be the key component in any yeild calculation?

The architects would surely know the defect density for their target process node and design to compensate for it, 65 nm is a mature node? I've posed a few yield related question on Aces and RWT and several of the responses included the point that defect density is currently a secondary factor.
I think you missed the discussions when AMD 0.5dd/cm^2 was put forward.Defect density makes the difference between world class processes and "good enough" ones.

I think I've stated pretty clearly in my original post :

....Does that tell us how man working chips NVIDA salvages ? No.The chip has a lot of redundancy since it is build from hundreds of parallel very simple cores.

What it tell us , is that NVIDIA gets 10-14 GTX280 ( or what's it's called ) premium chips per wafer.The rest are lesser models with fewer shader/vertex/etc units.

Out of those 10-14GTX280 , some might fail running at the required frequency or in the envisioned TDP.So I'd venture to say that they get less than 10 full fledged chips per wafer.
I think this is as clear as clear can be.