E8400/8500 degradation myth possibly busted?

[Fuji]

When you increase the voltage, you increase the current as well (ohm's law).

So you'd be putting even more current through the processor interconnects.

So given that the metal is already really thin don't you risk blowing out some of the interconnects?

Can't you also risk blowing your gate oxide? A good SiO2 gate will breakdown at 5-10 MV/cm or 5-10 V across a 10-nm oxide. (Intro do microelectronic fabrication). They say that the equivalent thickness of the gate dielectric to SiO2 is 1 nm. That seems to be pushing the limit. How does that work then - you'd be having .5-1 V across a 1-nm oxide. Or is the voltage supplied to the gate no where near the vcore range.