Broke Quad + 8GB + 500FSB+ Barrier with Max Formula

[Zucker2k]

care to share your settings?

These are my settings for 3.5Ghz (7x500) and 8GB on Max Formula running with RF bios 0403:

Extreme Tweaker
Ai Overclock Tuner : Manual
OC From CPU Level Up : AUTO
CPU Ratio Control : Manual
- Ratio CMOS Setting : 7
FSB Frequency : 500
FSB Strap to North Bridge : 333
PCI-E Frequency: 110
DRAM Frequency: DDR2-1000 (1:1)
DRAM Command Rate : 2T
DRAM Timing Control: Manual
CAS# Latency : 5
RAS# to CAS# Delay : 5
RAS# Precharge : 5
RAS# ActivateTime : 15
RAS# to RAS# Delay : 3
Row Refresh Cycle Time : Auto (for 52, can't be set manually in bios)
Write Recovery Time : 6
Read to Precharge Time : 3

Read to Write Delay (S/D) : 8
Write to Read Delay (S) : 3
Write to Read Delay (D) : 5
Read to Read Delay (S) : 4
Read to Read Delay (D) : 6
Write to Write Delay (S) : 4
Write to Write Delay (D) : 6

Write to PRE Delay : 14
Read to PRE Delay : 5
PRE to PRE Delay : 1
ALL PRE to ACT Delay : 6
ALL PRE to REF Delay : 6

DRAM Static Read Control: Auto
Ai Clock Twister : Auto
Transaction Booster : Manual

Common Performance Level [9]

Pull-In of CHA PH1 Disabled
Pull-In of CHA PH2 Disabled
Pull-In of CHA PH3 Disabled
Pull-In of CHA PH4 Disabled
Pull-In of CHA PH5 Disabled
Pull-In of CHB PH1 Disabled
Pull-In of CHB PH2 Disabled
Pull-In of CHB PH3 Disabled
Pull-In of CHB PH4 Disabled
Pull-In of CHB PH5 Disabled

CPU Voltage : 1.320 (CPU-Z)
CPU PLL Voltage : 1.50v
North Bridge Voltage : 1.65v
DRAM Voltage : 1.80v
FSB Termination Voltage : 1.50v
South Bridge Voltage : 1.050v
SB 1.5V Voltage : 1.50v
Loadline Calibration : Enabled
CPU GTL Reference : 0.67X
North Bridge GTL Reference : 0.67X
DDR2 Channel A REF Voltage : Auto
DDR2 Channel B REF Voltage : Auto
DDR2 Controller REF Voltage : Auto

Advanced CPU Configuration:
Everything Disabled