AMD Istanbul chip die picture

[fellix_bg]

Rounding up the L3 to 8MB would be nice, too.

What's actually shocking is the bad L2 density/design overhead.

The L2 cell density in Shanghai is on par with the Nehalem's one.
The odd thing here is that AMD is reusing that L2 design for the L3 cells, while Intel will be using brand new denser L3 cells for Nehalem (~50&#37.