**Unified** DFI LanParty UT 790FX-M2R-M2RS / Phenom /Data Base Thread**

[aGeoM]

Hmm as usual I mixed up NB-VID and NB-FID in my previous post. I have in mind that i used different nb-fid's with CnQ enabled turing my p-state testings and it worked fine.

I whish it worked for me, this 9850BE, is stable if I set the MSR registers to 2700@default VID, but from BIOS I need to feed some more volts, NB it's ok @2400, so KTE help me to write the ".ini" to use with Sam2008 tool to set CPU speed at 2700, but for NB@2400 I have to manualy change it in Baredit and reboot, thats a PITA.

Thank you for testing.
Even if you select that "B0 D24 F3" pci register in the dropdown again?
If i write someting into 0x1E8 it first shows 0x00 as it's new value. After I loaded the pci register again by selecting it in the dropdown the value i wrote in shows up and the data from that register shows up in 0x1EC.
Is bit 3 ox 0x1E4 0b on your system?

Well after 0x1E8 write first shows 0x00, but after I load it again it reads the value entered at the same adress 0x1E8. ie 0x1E8=0x06

Here's a SS defaul system/0x06@0x1E8: