I finaly managed to cripple the bios on the board with an k8 cpu.

I ran a few tests on 0x2e whom ran fine. Next lm-sensors version should have an updated detection routine to sort out the dangerous chip at 0x2e.

Then i tried "i2cdetect 0" which did not show the clock generator chip at 0x69 now with the k8. I was curious if i can dump the chip and tan "i2cdump 0 0x69". I got only XX's as response. I tried "i2cdetect 0" again and now even the chip at 0x2e was gone. I thought, k the smbus interface does no longer work coreect so i tried to reboot. Since then the borad stucks at C1 no mather what cpu i put in.
The M3A works fine with the 5000BE i used for the latest test on the Sapphire.

till i get the board boot proper again.

Quote Originally Posted by Rammsteiner View Post
Justapost, again, thx a very lot for that!

Though i noticed just one little strange thing:

I played with Core 4 in CCPUID and set it to 2.9Ghz. But I ran Prime and it rebooted. Well, I restart and set 2.8Ghz again on the 4th core. But AMD Power Monitor now reads the 2nd core to be 2.8Ghz, so does CPU-Z. However, the 4th worker thread in Prime95 was running the fastest of all of them.

So exactly what core got the OC now? the 2nd (Core #1) or the 4th (Core #3)?

[EDIT] Well, Central Brain Identifier shows the 4th core to be OC'd as well lol...
That is really odd. I'd expect at least AMD Power Monitor and CBId to read from the core's msr registers.
Can it be that there are two ways to bind a task to an core. One uses the msr registers numbering and another one uses windows internal numbering (whom seems to change during reboots).