the temperature of the chipset is a mayor factor in getting signal stability?
and the cooler the better? does the signal window widen up the cooler the chipset gets? 30 is xxxx, 40 is xxx and 50 is x?
or does it just change depending on the temperature? and the singal window moves with differnt chipset temperatures, at 30 its at xx, and 40 its at xy and at 45 its at yz
tweaking this must be very frustrating... since there is still no reliable way to detect 100% stability. it seems that just putting load on the chipset doesnt trigger the issues, varying states of idle and load seem to trigger the problems... and simulating that to test stability is a pain in the arse....
so at any time you might think NOW you got it stable, but then it fails again after 2 days... what we need now is a propper detection scheme or benchmark or tool.
the scf scannow doesnt seem reliable as we get many false positives
several people reported that streaming a lot of data triggers the problem, has anybody used pcmark or some other overall system benchmark that tests each part of the system after the other? this should result in repeated idle and load situations on the chipset to some degree and might trigger the instability/corruption issues quickly.
once we know how to trigger and detect it quickly, we can find out how to improve the situation and get rid of the problem id say.
maybe we can come up with a guide on how to tweak vtt on 790, but seeing as its a different thing for 45 and 65nm cpus and quads and dualcores... and each cpu and board behaves different... this guide would have to be quite complex.




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