New Memory Tweaker for Intel Chipsets

[FELIX]

what's the lowest register encoded Performance Level possible on P35?

I think it's possible to run at PL 2 with very lower DDR2.

Can you have PL4? (I don't know which address/bit it is)

Yes it's possible.
Performance Level is at OffSet 248h bit[12-8] for Channel A and 648h bit[12-8] for Channel B.

Why do both of my RAM modules have different PL on bootup?

I don't know; with my IP35-PRO, if I boot with my G.Skill PC-6400 at 266Mhz, I got PL3 on channel A and PL4 on channel B...
It's the same with Read Delay Phase Adjust.

In 3.5 BETA (downloaded before the above linked one) when I click to only show one set of values for both modules (tick box between A and B),
many times it won't change.

Is timings on Channel A & B are the same?

Also, how can we check if a value we change in Memset actually changes or if it actually changes to that value?

I don't understand? if you change a timing with memset and click on Apply, the timing is changed immediately.
You can check it with Everest wich show timing in real time.

hey, how did you do that?
I was already running 35 beta... is this a new build?

Yes, it's a new buid wich I add some tRFC values in this morning.