Savantu, how is 40 ns out of 59 cycles only 17% slower? Anyway, typically L2 latency is 15 cpu cycles on core 2/K8 while going to main memory is 150+ cycles. It's 10 times slower going to main memory, fortunately with branch prediction and caches it doesn't happen often. Main memory access can be generalized as 10x slower than cache. A cache miss always causes a major slowdown, but AMD minimizes that with IMC.