Server Cpu's will be switched to B2 too... its just due to the later launch of the desktop parts that they will get the B2 form the start.
Server Cpu's will be switched to B2 too... its just due to the later launch of the desktop parts that they will get the B2 form the start.
B1 or B2 or Bn , IPC stays the same , unless you've taken the blue pill.
yep... but B2 is said to bring the higher clocks...Originally Posted by savantu
anyway, that doesnt mean too much, since intel can simply increase the launch speeds of penryn....
from hat i've heard the situation with the B1 and B2 is pretty much the same again as with Thoroughbred A and B...
Last edited by naokaji; 09-10-2007 at 10:03 AM.
AMD released benchmarks
http://www.amd.com/us-en/Processors/...6_8800,00.html
If AMD can make money with B1, why not? Better then not making any until B2 gets out.so you say server customers get reduced performace parts and desktop get the fully fledged barcelona cores... kida ripoff ist it.
And i think he means phenom won't run at 2.0Ghz with 533/667 ECC ram and with old chipsets.
Did you missed the part where AMD supplied the test systems ?
Really? I thought they were suplied by McDonalds.
Your point being? Phenom will run at 2.0ghz still B1, with 533mhz Ram and won't use RD790?
How's your prediction that K10=k8 plus 2 more cores, is working for you?
uhn, he doesn't said its k8 + 2 cores, he just said the IPC wont change, and IPC also doesn't change with higher clockspeed.
I don't understand why people mixing Server and desktop CPU's.
For one people who're buying servers are buying them for exact purpose. With that in mind, K10 demolishes Intel in some erias, especialy if you consider price of they momentarly fastest chip - 2(8)350.
On some other fields, it looses. So, people who're buying servers will choos platform depending on their needs.
One thing is certain: no one will overclock these CPU's! With that in mind, it's pointless to draw conclusions about desktop part - Phenom from these benches. Phenom will work with much faster memory (1066 vs. 667 MHz, and will work on higher frequencies).
Also, saying that K10 flops on a base of very small nubmer of server benchmarks is skewing the bigger picture.
We still need to see Virtualization benchmarks, and I'm certain that with further improvements on software side, we'll se much clearer of what Barcelona is capable.
Very importan thing is that AMD priced Barcelona very realisticaly, so we can expect same thing for desktop part, and at the end that's all that meters.
Now, some benchmarks:
bare in mind that this is B1 revision, and Phenom will be B2
QFT
If you think about the cost of using these in a data center vs. using Xeons(+100W TDP) with the difference in mind then this is quite a deal, the performance difference is negligible. I don't feel like speculating about real world power costs on a server room but at the end of the year come budget allocation time those few dollars add up. With the desktop part in my mind, if the Mem controller is truly being crippled due to production issues coupled with these low clock speed(s); I truly believe AMD has quite a product on their hand if and when they resolve these issues. Ladies and gentleman, I think the show we've all been waiting for is just getting started.
Go AMD,
h
Last edited by h@RRy; 09-10-2007 at 12:03 PM.
So far all the reviews have shown Barc with worse latency to main memory than the 2.6 GHz Opteron running the same registered ddr2-667 . I think somethings screwy with these preview benchmarks using es barcs, the nda isn't over yet, I'm still waiting for final reviews, that will show up I suppose in 4-48 hrs. Looks like something's up with the L3 cache or BIOS/drivers, which isn't working like it should. In any case, I don't expect a large increase in performance but mainly the large mem footprint apps like games and media encoding/decoding and some rendering should see a boost.
Has anyone else bothered to think that the performance could be lagging due to the motherboard? Of course barcelona is pretty much designed for socket f, but shanghai will use f+ along with the phenom cpus using am2+. So if you think about it, a lot of the benefits k10 will bring aren't possible to utilize on older boards, so hopefully ht3, split power planes and what not will have some benefits to give us what we wanted to see
Of course. There's a slow L3 in the way on the K10. That's the trade off.
maybe because lots of them aren't using ES? but silicon that is actually going to be released by now...
An added cache is going to add to memory latency, that's a simple fact. I don't know if I can explain it correctly however: when the processor tries to look up some data it has to go through more levels of cache, and all the latencies from the caches that get checked add to the overall memory latency when the data can't be found in the cache (simply put).
But thanks to an added cache the CPU needs to access the memory less often (because the data can be found in the additional cache) and will be accessed faster anyway.
If the chip ain't a mircale the chipset surely will be one...
btw is it correct split power planes were already utilised in the reviews (at least that's what is statetd by anand)?
"Update: AMD has confirmed that these motherboards are Socket-1207+ and thus support split power-planes. We apologize for the error."
Yeah Barc is a nice server chip, but with the release of Penryn just around the corner this launch is getting quite lackluster...
Indeed.uhn, he doesn't said its k8 + 2 cores, he just said the IPC wont change, and IPC also doesn't change with higher clockspeed.
The funny part is that IPC actually diminishes at higher frequency.Since memory clock stays the same , the wait for memory becomes greater wrt to CPU cycles , thus you're burning more cycles doing nothing.
What I want to link is an article which is by all means excellent in describing the current situation :
http://www.tgdaily.com/content/view/33770/118
Real-world benchmarking
AMD's new memory subsystem contains optimizer technology which AMD claims will show up to 50% increases in throughput. The benchmarks which stress the memory subsystem do show performance increases. These memory improvements are also targeted primarily at high performance computing applications, though desktop Phenoms will also see benefits.
Still, even with the memory enhancements a LINPACK benchmark at AnandTech.com shows Xeon 5345 besting Barcelona by about 17%. The 5345 was chosen because of its commensurate power consumption, even though there are also two faster Xeons with greater performance than this one.
Of all the tests performed at AnandTech, Barcelona won 5 and Xeon won 3. The total percentages by which each one beat the other were 27.13 and 73.94. This means that when Barcelona won, it won by much less percentage-wise. And when Xeon won it, won by a a lot more. These tests do not demonstrate the performance AMD's website indicated they should, nor do they include the fastest Intel parts available today.
If we then look to a much more comprehensive benchmark at The Tech Report we find Barcelona winning 3 tests, and Xeon winning 23 tests. The total percentages were 123.63 and 634.26. It's also worth noting that the bulk of the large Barcelona percentage shown here comes from a single test which included a 121.14% improvement over Xeon in memory bandwidth using a 1 GB test set. If we remove that test, then Barcelona's three wins only total a 2.49% over Xeon's. And if that memory test had used data sets of anything at 64MB or below, then it would've shown Xeon winning by similar percentages at various data set sizes.
All told at both sites, Barcelona wins 8 and Xeon wins 26. The total percentages across 38 benchmarks were 150.76 and 708.2 values. The average winning percentages are 18.85% for Barcelona and 30.79% for Xeon. If we remove the one benchmark which had Barcelona winning by 121.14%, then the results are average winning percentages for Barcelona of 4.23% on only 22% of the benchmarks. And 32.19% for Xeon on 78%. This indicates that in those instances where Barcelona wins, it wins by a much smaller margin than Xeon. So small that it's hardly worth mentioning, especially when you consider there are two faster clocked processors available today from Intel.
It's also interesting to note that AMD emphasizes Barcelona's power efficiency. And yet, they introduced a new method of rating their power consumption which shows better values than their old method. And in addition, in the real-world AnandTech.com was forced to conclude that the performance-per-watt advantage goes to Xeon 5345 by 13% over Barcelona 2350.
Conclusion
With Barcelona, there is a lot of data to analyze before you can make heads or tails out of performance claims. But in such a wide ranging set of tests a prominent picture begins to surface. AMD's website benchmarks just don't match the real world's.
If cost is key, then Barcelona can offer greater performance with more value (today). If performance is key, then unless you have specific performance needs and it can be shown that Barcelona will perform better in those particular applications, you'd be better off going with the higher-end Xeons. They perform proportionally better when they perform better than Barcelona. And in those cases where they lose, it's only marginally. In the alternative, it might be worth waiting a few months for the upcoming 45nm Harpertowns. They will have much less power consumption and will likely be priced to compete very handidly with Barcelona on the high-end.
What should've been AMD's biggest release ever, their native quad-core design, has fallen significantly short of the hope and hype. The theoretical 2.6 GHz chip would've been wonderful if released today. The Tech Report was able to benchmark one of those chips and it performed quite well as the 2360 SE. That chip would've lived up to the expectations. But it was not released today. Of the ones available, it shows a processor that does not have a lot of performance-winning life ahead of it when we consider Intel's upcoming 45nm releases just two months and one day away.
Barcelona needed to be a slam dunk for AMD. It has turned out to be much less. AMD now needs to focus solely on solving their manufacturing issues and releasing faster clocked Barcelonas. AMD's customers need to be knowledgeable of the fact that several of Intel's upcoming 45nm products will be here in a few months. These will likely deliver better performance on less power.
If AMD continues as they have this year. If they continue to lose large amounts of money each quarter. And if they are not able to achieve high clock speeds with their 65nm SOI technology at a pace consistent with Intel's anticipated ramping at 45nm, then this launch will be the turning point. It will prove out to be the beginning of the end for AMD.
Until we saw Barcelona numbers there was always hope. AMD knew this and kept their cards very close to their chest, not even releasing products for review until late last week. Unless AMD can turn it around and significantly ramp up the clock speed to compete with and win against Intel's 45 nm competition, then AMD may be headed into a life-threatening storm. The next six months will be telling for AMD.
Not correct.
From what I understand, what Jacky was getting at with the cache latencies being reduced at a high clockspeed is actually correct. When going to RAM, the processor has to go through all the cache levels of the processor, including the 'slow' L3. The latency of the L3 cache is proportional to a speed (not sure on the terminology) that is increased when the clockspeed is raised. Therefore, with figures quote on the Tech Report site, the cache latecies are 23ns on the slower 2.0Ghz chip and 19ns on the faster (2.5Ghz) chip.
Therefore, increasing the clockspeed could result in what would seem a higher IPC.
Also, TG Daily slamming AMD with a pro-Intel bias? Well I'll be damned...
EDIT: Also, after more careful reading,
And correct me if i'm wrong, but the motherboard doesn't support split power planes, so the memory controller would have been running at 1.6Ghz. Based on that fact alone, we should see improved performance from the new mobos.
Last edited by Richie P; 09-10-2007 at 01:33 PM.
CPU's:- Xeon 3060 | Q6600 G0
Mobos:- MSI X48C (Coming!) | MSI X38 Platinum | Asus P5K Deluxe
RAM:- Kingston HyperX PC3-14400 | Team Xtreem PC2-6400C3 | Crucial Ballistix PC2-6400 | Kingston PC2-9600
Graphics:- PNY 9800GX2 | EVGA 8800GTX
PSUs :- Antec TPQ-1KW | Ultra X-Pro 600w EE
Cooling:- Nozzled FuZion | MCW60 | DDC w/ DDCT-01s | PA120.3
I'm probably completely wrong here so I apologise now. I thought due to the IMC being clocked at memory speed and not CPU speed. Won't the L3 cache increase in speed with faster DDR2 if this is the case?From what I understand, what Jacky was getting at with the cache latencies being reduced at a high clockspeed is actually correct. When going to RAM, th eprocessor has to go through all the cache levels of the processor, including the 'slow' L3. The latency of the L3 cache is proportional to a speed (not sure on the terminology) that is increased when the clockspeed is raised. Therefore, with figures quote on the Tech Report site, the cache latecies are 23ns on the slower 2.0Ghz chip and 19ns on the faster (2.5Ghz) chip.
Therefore, increasing the clockspeed could result in what would seem a higher IPC.
Also, TG Daily slamming AMD with a pro-Intel bias? Well I'll be damned...
To further add to your question, aren't the L1, L2 and L3 running at full core speed?
http://techreport.com/articles.x/13176
Table at the bottom of that page, and from my quote above, the cache latency is affected by the northbridge speed as it is incorporated into the package itself.
I may be wrong, please correct me if i am
CPU's:- Xeon 3060 | Q6600 G0
Mobos:- MSI X48C (Coming!) | MSI X38 Platinum | Asus P5K Deluxe
RAM:- Kingston HyperX PC3-14400 | Team Xtreem PC2-6400C3 | Crucial Ballistix PC2-6400 | Kingston PC2-9600
Graphics:- PNY 9800GX2 | EVGA 8800GTX
PSUs :- Antec TPQ-1KW | Ultra X-Pro 600w EE
Cooling:- Nozzled FuZion | MCW60 | DDC w/ DDCT-01s | PA120.3
No, not of course. The L3 adds a L3 eviction and write back penalty on an L3 miss (in addition to L1 and L2), but the improved DRAM prefetchers, buffers and crossbar should be making up for it. It looks to me like 40 cpu clock cycles are being eaten up.
There's no website bias in SPEC scores.
http://www.techarp.com/showarticle.a...tno=443&pgno=3
That tgdaily article forgets to mention the fact that the Xeon is clocked 233Mhz higher. Meaning that Barcelona is pretty good, especially being benched on such a new platform. For instance, the IMC wasnt overclocked.
Given the spec rate numbers are so much better than the old Opteron, I think the latency is being traded for bandwidth, but the techreport 1 GB cache+mem sandra bench (11.5 gb/sec) is about 2/5th what my overclocked 3.08 GHz Allendale does. So I don't see the bandwidth..and the spec rate isn't translating into great app performance. I still think somethings screwy, BIOS, drivers or L3 cache.
Interesting thread at pcper, apparently not many barc samples about.. limited to non desktop apps?
http://forums.pcper.com/showthread.php?t=445374
I guess this means no reviews of barc on games other than the anand preview for a bit going forward.
Last edited by JVguest; 09-10-2007 at 02:22 PM.
from what i've read the l3 cache is a spilloff cache, and the memory controller feeds the l2, so the CPU isn't held up by the l3 latency (which would result in a pretty bad performance hit).cache latency (seconds) = latency (clocks) * duration of a clock (seconds)
and duration of a clock (seconds) = 1/frequency (to get seconds per cycle instead of cycles per second)
so latency (clocks) = latency (seconds) / (1/frequency) = latency (seconds) * frequency
using 23ns @ 2ghz, 19ns @ 2.5ghz:
(23*10^-9)*(2*10^9) = 46 clocks
(19*10^-9)*(2.5*10^9) = 47.5 clocks
latency in clockcycles increased going to 2.5ghz, there's no way you'll get better than linear scaling... that was a myth
Last edited by hollo; 09-10-2007 at 07:28 PM.
Thank you!!!! I don't think people really understand this concept.
Guys.... processors do not understand time, they are digital -- they know 'tick-tick-tick', the temporal spacing of 'tick-tick-tick' is what you and I understand.... IPC will not get better by simply raising clock speed.... not possible.
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