X48 Rampage Formula Preview.

[leo27]

I've also been doing some tweaking and it seems I hit a FSB wall at 432Mhz, at 433Mhz the boot process gets stuck at DETDRAM even though I've tested the ram to work at 1200Mhz at 1.80v.

I probably have a FSB Hole around the 433-440Mhz or so mark but I haven't really tested that out.





the Settings I used are:

*Extreme Tweaker* 
Ai Overclock Tuner               [Manual] 
OC From CPU Level Up             [Auto] 
CPU Ratio Setting                [08.0] 
FSB Strap to North Bridge        [400] 
FSB Frequency                    [432] 
PCIE Frequency                   [103] 

DRAM Frequency                   [DDR2-1152MHz] 
DRAM Command Rate                [2N] 
DRAM CMD Skew on Channal A       [Greyed Out] 
DRAM CMD Skew on Channal B       [Greyed Out] 
DRAM CLK Skew on Channal A       [Auto] 
DRAM CLK Skew on Channal B       [Auto] 

DRAM Timing Control              [Manual] 
 1st Information 
  CAS# Latency                   [5] 	
  RAS# to CAS# Delay             [5] 	
  RAS# PRE Time                  [5] 	
  RAS# ACT Time                  [15] 	
  RAS# to RAS# Delay             [1] 
  REF Cycle Time                 [Auto (52)] 
  WRITE Recovery Time            [2] 	
  READ to PRE Time               [1] 
 2nd Information 
  READ to WRITE Delay (S/D)      [8] 
  WRITE to READ Delay (S)        [3] 
  WRITE to READ Delay (D)        [4] 
  READ to READ Delay (S)         [4] 
  READ to READ Delay (D)         [5] 
  WRITE to WRITE Delay (S)       [4] 
  WRITE to WRITE Delay (D)       [5] 
 3rd Information 
  WRITE to PRE Delay             [13]	
  READ to PRE Delay              [4] 	
  PRE to PRE Delay               [1] 	
  ALL PRE to ACT Delay           [4] 	
  ALL PRE to REF Delay           [4] 
  Refresh Period		 [16120T]

DRAM Static Read Control         [Disabled] 
Ai Clock Twister                 [Lighter] 
Ai Transaction Booster           [06] 		
Pull-in of CHA PH1	         [Disabled]	
Pull-in of CHA PH2	         [Disabled]	
Pull-in of CHA PH3	         [Disabled]	
Pull-in of CHA PH4	         [Disabled]	
Pull-in of CHB PH1	         [Disabled]	
Pull-in of CHB PH2	         [Disabled]	
Pull-in of CHB PH3	         [Disabled]	
Pull-in of CHB PH4	         [Disabled]	
CPU Voltage                      [1.45000v] 
CPU PLL Voltage                  [1.50v] 
North Bridge Voltage             [1.25v] 
DRAM Voltage                     [1.80v] 
FSB Termination Voltage          [1.28v] 
South Bridge Voltage             [1.05v] 
SB 1,5V Voltage                  [1.50v] 
Loadline Calibration             [Enabled] 
CPU GTL Voltage Reference        [0.67x] 
NB GTL Voltage Reference         [0.67x] 
DRAM Controller Voltage REF      [AUTO] 
DRAM Channel A Voltage REF       [AUTO] 
DRAM Channel B Voltage REF       [AUTO] 

CPU LED Selection                [CPU Voltage] 
NB LED Selection                 [North Bridge Voltage] 
SB LED Selection                 [South Bridge Voltage] 
Voltiminder LED                  [Enabled] 

CPU Spread Spectrum              [Disabled] 
PCIE Spred Spectrum              [Disabled] 
Cpu Clock Skew		         [Delay 200ps]
NB Clock Skew		         [Delay 100ps]

*CPU Settings* 

CPU Ratio Settings	         [08.0]
C1E Support	                 [Enabled]
CPU TM Function	                 [Enabled]
Vanderpool Technology            [Disabled]
Execute Disabled Bit	         [Enabled]
Max CPUID Value Limit            [Disabled]

But this fails P95+UT2004 Blend very quickly.
As you can see memory is not the issue, the problem is almost certainly FSB Termination voltage however LinX failed at voltages from 1.30-1.36v (around 1.36-1.42v Real).

Any suggestions??