That makes a lot of sense Wiz!
Something along those lines would be executed by controlling say 3 or 4 dedicated GPIO pins which would be used to assert/deassert the VID pins based on the required voltage table bit mask to obtain 3 or 4 preset Performance Level VIDs? Ie. use different open GPIO pin combination to get 4 bit mask range, 00 01 10 11 of which each has a preset VID entry to connect VID0-VID7 pins based on what Voltage Table mask is needed to output each performance level voltage.
I'm not all that knowledgable on the GPIO functionality so I've just taken a stab at how i think it may be done, feel free to correct me if i've missed the target heh.
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