Source:![]()
http://www.technoa.co.kr/content/View.asp?pPageID=57474
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- Features & Comparison -
* Only newer ABIT board got the new high Vdimm features please take note!!!!
1) Mainstream Level
AN8 SLi : nForce4 SLi + Silent OTES Heatpipe + 7.1 Audio (Max Vdimm 3.55V)
AN8 Ultra : nForce4 Ultra + Silent OTES Heatpipe + 7.1 Audio (Max Vdimm 3.55V)
AN8 V1.0 : nForce4 + OTES + 5.1 Audio (Max Vdimm 2.80V only)
*AN8 V2.0 : nForce4 + Silent OTES Heatpipe + 5.1 Audio (Product Discontinue by ABIT)
2) Enthusiast Level
Fatal1ty AN8 SLi : nForce4 SLi + OTES + 7.1 Audio + uGuru Front Panel (Max Vdimm 3.55V)
Fatal1ty AN8 : nForce4 Ultra + OTES + 5.1 Audio + Ram Flow OTES (Max Vdimm 2.8V only)
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- Overview -
Capacitor : Rubycon & Sanyo Oscon
VCore Regulator : ISL 6559CB
Vcore circuit : 4 Phase
Vdimm option up to 3.55V without jumper setting
Only with Rev E CPU you will get higher Memory Divider
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- Voltage Features -
for AN8-SLI , AN8-SLI Fatal1ty ,AN8-Ultra
- VCore: Default to +0.35V from default Vcore ( 0.025V increment)
- DDR Voltage(VDimm) : 2.50V - 3.55V ( 0.05V Increment)
- DDR VTT : 1.25V - 1.75V & DDR/2 (0.05V increment)
- Chipset Voltage : 1.50V - 1.80V (0.05V increment)
- Hypertransport Voltage : 1.20V - 1.35V (0.05V increament)
- CPU Reference Voltage : -0.10V to +0.10V (+0.01V increment)
- DDR Reference Voltage : -0.10V to +0.10V (+0.01V increment)
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Overclocking Guide
- Samsung TCCD Tweaking Bios Setting
- DDR VTT Voltage : Set it 50% of DDR Voltage (recomended setting)Code:1) Tweak by forumer : 290MHz on OCZ EL PC3200 Rev2 (2x512mb) DDR Clock : DDR400 (1:1 sync) CAS Latency : 2.5 row cycle time : 14 row refresh cycle time : 24 ras to cas delay : 4 ras to ras delay : 3 min ras active time : 10 ras precharge time : 3 write recovery time : 3 write to read delay : 2 read to write delay : 5 Dram command rate : Auto burst length : 4 Beats bank interleaving : Enable 2) Tweak by chew* : 315MHz on GSkill F1 LA PC3200 (2x256mb) DDR Clock : DDR400 (1:1 sync) CAS Latency : 2.5 row cycle time : 9 row refresh cycle time : 14 ras to cas delay : 4 ras to ras delay : 2 min ras active time : 6 ras precharge time : 3 write recovery time : 2 write to read delay : 2 read to write delay : 3 Dram command rate : 1T burst length : 4 Beats bank interleaving : Enable DDR Voltage : 2.8V DDR VTT : 1.5V
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- AN8 Series Overclock Database-
ABIT World Record Holder
HTT : chew* @ 395MHz
TCCD : chew* @ 325MHz 2.5-4-3-6-1T
BH5 : chew* @ 268MHz 2-2-2-6
AN8-SLI Fatal1ty User
- Sheik (a.k.a Solo)
HTT : 371MHz x 7 Screenshot
BH-5 : 266MHz @ 2-2-2-6 3.55V Screenshot
TCCD : 290MHz @ 2.5-4-3-5 Screenshot
- topboy (bleedinedge guy)
TCCD : 290MHz @ 3-4-4-10 Screenshot
- Bri62
TCCD : 280MHz @ 2.5-4-4-8 Screenshot
- rancid
TCCD : 240MHz @ 2.5-3-3-6 Screenshot
AN8-SLI User
- chew*
HTT : 395MHz x 6 Screenshot
TCCD : 325MHz @ 2.5-4-3-6 Screenshot
BH5 : 268MHz 2-2-2-6 3.5V Screenshot
- Sheik (a.k.a Solo)
BH5 : 265MHz x 10 Screenshot
AN8-ULTRA User
- dinos22 :
UTT : 254MHz 2-2-2-5-2T 3.55V Screenshot
TCCD : 311MHz 2.5-4-4-8-2T 2.90V Screenshot
AN8 Fatal1ty User
- chew* : Board damaged after Vdimm mod experiment
HTT : 385MHz x 6 Screenshot
TCCD : 300MHz @ 2.5-4-3-6 Screenshot
- forumer
TCCD : 290MHz @ 2.5-4-3-10 Screenshot
AN8 Ver1.0 User
- varzmaster :
HTT : 370MHz x 8 Screenshot
TCCD : 296MHz @ 2.5-4-3-7 Screenshot
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- Review-
AN8-SLI Fatal1ty by Solo @ net-forums.net
http://www.net-forums.net/forums/Abi...rd-t21821.html
AN8-Ultra by Sin22 @ sgoverclockers.com
http://www.sgoverclockers.com/module...t&id=13&page=1
AN8-Ultra & AN8-SLI by Solo @ net-forums
http://www.net-forums.net/forums/Abi...ed-t22067.html
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- Bug & Issues -
- chew* : AN8 Series bug & issue compilation http://www.xtremesystems.org/forums/...ad.php?t=56099
- Issue running 1T with Venice CPU at high HTT
- Temperature higher than any other board
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- Request -
- We need more advance memory timing option to take full advantage clocking TCCD memory
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