AMD "Piledriver" refresh of Zambezi - info, speculations, test, fans

[ga1ve1an]

I am surprised that no one has talked about this more in regards to power consumption and also clocking ability. So here goes..

First how many transistors does the L3 cache account for? Anandtech has mentioned that it will be taken out of bulldozer derivatives which includes trinity, Piledriver, and all future cores because it serves no purpose. Only benefits server type workloads. Here is a link of Anandtech and VR-zone mentioning its non importance with regards to trinity and future derivatives, and techreport mentioning how it didnt provide much more bandwidth.

http://www.anandtech.com/show/4955/t...x8150-tested/2

http://vr-zone.com/articles/report-a...led/13807.html

http://techreport.com/articles.x/21813/6

But my question is how many of those 2 billion transistors are the 8mb l3 cache? Everyone knows by the die size the L3 takes up alot of space. Also how much would power consumption decrease, and clocking ability increase with the L3 cutout. I think that is how they are getting the power reductions in trinity. I am curious because not just one site and many here even say that bulldozer is a server chip just released for us also with pushed up clocks. Also most know the l3 cache serves only servers because they can always recompile programs quickly for server systems internally.

The consumer programs dont nearly get updated and recompiled as quickly as server workload programs do. Is AMD likely to have a two production lines? One low demand with L3 cache for servers, second high demand mainstream no L3 cache?

[Manicdan]

L3 has no purpose for client uses?
then why is Phenom stronger than Athlon with the 45nm chips?

[zir_blazer]

But my question is how many of those 2 billion transistors are the 8mb l3 cache? Everyone knows by the die size the L3 takes up alot of space. Also how much would power consumption decrease, and clocking ability increase with the L3 cutout. I think that is how they are getting the power reductions in trinity. I am curious because not just one site and many here even say that bulldozer is a server chip just released for us also with pushed up clocks.

As far that I remember Cache L3 was never power hungry. It is actually a "cheap" way of increasing performance with minor increase in power consumption, for as long as you don't care having ridiculous huge and expensive dies, though Intel always gave itself such a luxury in their Server lines with Cores with tons of Cache L3.
To know how much of an impact Cache L3 got in Frequency scalability you could compare Propus BL-C3 to Deneb RB-C3. I find it pretty weird that I don't even remember having saw Athlons II getting on average higher Frequencies that Phenoms II, actually, they usually are under it, something that I wasn't expecting. I suppose that this must be related to something that I recall JF-AMD mentioning that they can tweak the Wafer manufacturing process to increased yields at the expense of Frequency headroom or the other way around. It makes sense that the Propus Wafers, being for a value Processor, are going to go to maximize yields, while Deneb being pretty much a mainstream or AMD high end part for Frequency.

Also most know the l3 cache serves only servers because they can always recompile programs quickly for server systems internally.

The consumer programs dont nearly get updated and recompiled as quickly as server workload programs do. Is AMD likely to have a two production lines? One low demand with L3 cache for servers, second high demand mainstream no L3 cache?

Cache usually helps performance in everything, not only Servers. On some applications it may not help, but on general it does. However, Cache L3 is expensive in die size. Because Servers lines got higher margins due to the premium of being Server parts, they can give the luxury of adding Cache L3 to increase performance, but on Desktop it makes no real sense considering it die size cost. Besides, AMD lineup was precisely like that, you had a value part with no Cache L3 (Propus) and another one with it (Deneb).

L3 has no purpose for client uses?
then why is Phenom stronger than Athlon with the 45nm chips?

Actually it says so on the Anandtech Review he linked...

There's a single 8MB L3 cache that's shared among all Bulldozer modules on a chip. In its first incarnation, AMD has no plans to offer a desktop part without an L3 cache. However AMD indicated that the L3 cache was only really useful in server workloads and we might expect future Bulldozer derivatives (ahem, Trinity?) to forgo the L3 cache entirely as a result.

[ga1ve1an]

So basically cutting the L3 cache will only increase yields (due to a smaller die), and will have no effect on the power comsumption or clocking ability? I would think the faster you are clocking a die that has all kinds of complex L2 and large L3 caches, the more voltage it would need to have everything working properly, therefore increasing consumption and limiting clocking ability. The inverse of this is not true? Didnt AMD directly say they had planned on the latencies being lower based on higher clocks they were hoping for. That means that the caches have to be running faster as well consuming more, no?

New question based on a reply. If yields are effected based on the size of the die(especially as rough as GF yields on 32nm seems to be), and the cache is a large percentage of the die, is it possible if there are errors or problems with parts of the cache due to yield that they are closing modules based on cache yield also, therefore giving good 8150's with bad partial caches resold as 6100's and 4100's?

[Dimitriman]

AMD should focus on getting their cache latency lower instead...
And why are AMDs transistors denser than intels at the same node but yet their cache isnt? I seem to recall that intel can fit a lot more cache within the same die area than AMD.

[Smartidiot89]

L3 has no purpose for client uses?
then why is Phenom stronger than Athlon with the 45nm chips?

That was true back then, but this is a whole new architecture. We shall see, but derivates will most likely have different dies for consumers and servers where things such as cache (and unnessary amounts) will be adjusted depending on market.

[demonkevy666]

That was true back then, but this is a whole new architecture. We shall see, but derivates will most likely have different dies for consumers and servers where things such as cache (and unnessary amounts) will be adjusted depending on market.

slightly off topic, here
which why i want to see opteron 6220 vs FX 8120 95 watt .

also isn't SOI have 10% bigger transistors the bulk ?

[gosh]

L3 has no purpose for client uses?
then why is Phenom stronger than Athlon with the 45nm chips?

Phenom prefetcher is weak and only works on the L1 cache. Bulldozer has a huge L2 cache and strong prefetchers for it. That will remove some of L3 cache advantage for a cpu that don't have prefetchers or prefetchers only working with L1 cache.

[cesariuth]

300-900MHz with TC 3.0 for pelidriver-trinity
http://semiaccurate.com/2011/11/04/g...r-trinity-yet/

But TC 3.0 will have only more frecuencies? or maybe a thirth state of turbo core?

[FlanK3r]

its not more frequencies, because example FX 4170 has 300 mHz max boost and example FX 8120 has boost 900 MHz. So, the same

[informal]

GPU got the Turbo now,that's what's new .

[undone]

Trinity engineering sample spec list and other info

http://www.computerbase.de/news/2011...urchgesickert/

[Olivon]

Thanks undone !





FM1 & FM2

[Manicdan]

does this mean FM2 socket will support FM1 chips?

[Olivon]

FM2 processors could fit in FM1 socket but FM1 processors on FM2 socket seems impossible if the red circle got no hole in it :





10% better CPU between the donanimhaber document and the bigpao007's one.

[I.nfraR.ed]

Wait a little, I see some other differencies between FM1 and FM2



Bottom right hole (hole being equal to "no pins there") is shifted "one pin" to the left, compared to FM1.
Top left hole is shifted one pin to the left.

I see them physically incompatible.

On your second picture you should flip the cpu vertially first. Then there are some other difference's.



Pins marked with red on the cpu side will interfere with the socket notches. Correct me if I'm wrong.

[Olivon]

You're totally right I.nfraR.ed, I didn't noticed ! My bad !

Well, so, no FM2 processors on FM1 socket :/

[I.nfraR.ed]

Yes . We just need to see FM2 socket if it's incompatible both ways. Is there any picture already available?
If the corresponding notches will be shifted as well...then no love from AMD this time. Seems like they failed again.
FM1 seemed useless to me from the beginning.

[informal]

The guy with Trinity A0 says that it just matches Llano at 2.9Ghz in 3dmark and c11.5 ... He didn't say what model but I assume top 3.8Ghz. If so then there is no improvement versus bdver1...

[BeepBeep2]

The guy with Trinity A0 says that it just matches Llano at 2.9Ghz in 3dmark and c11.5 ... He didn't say what model but I assume top 3.8Ghz. If so then there is no improvement versus bdver1...

There is no way that it can be an improvement...
AMD is now 80% behind SandyBridge in Cinebench CPC, uses ~20% more power than the old architecture...giving a generous 10% leeway in a 30% gate shrink, 30% behind in WinRAR, which happens to be the only place so far that FX really "shines".
I hope Piledriver comes with some "I'm on acid" 50% IPC increase...

They need 20% more clock vs Llano so 700 Mhz over Llano, 3.8 Ghz should beat Llano by a few percent

[zir_blazer]

After Bulldozer unsuccessfull launch I'm quite sceptical about its successors because I still don't see if the architecture can be improved to become truely competitive or this entire experimental concept isn't useful for real world usage and should be canned, at least on Desktop and Mobile. The point is that until Bulldozer doesn't prove itself to be able to provide consistent, all-around better performance than a K10, getting brainwashed about the benefits of the next generations isn't going to do anything helpful considering current AMD credibility when you can simply sit where you are and not miss anything important until you get actual launch date results. What worries me is that if Bulldozer starts to replace K10 along all the product range and it still doesn't deliver, we are going to miss K10 architecture a lot, as I suppose many did when Northwoods started to become scarse as Prescott production had its take off. And, compared to Prescott replacing Northwood, AMD DOES have a 32nm K10 shrink design ready as part of Llano, while Northwood didn't had any type of 90nm shrink.
Thuban die size is 346 mm^2 at 45nm while Zambezi is 315 mm^2 at 32nm. A hyphothetical 32nm shrink of Thuban should be around 242 mm^2 (346 * 0.7). You could have end with something that is smaller than Zambezi thus cheaper to manufacture, lower power consumption that either Thuban or Zambezi, a bit higher Frequency headroom, and were it incorporating Llano's K10 improvements, slighty higher performance per Hz, meaning that such 32nm Thuban could make Bulldozer have no reason to exist on Desktop. As I asumme that AMD should have knew with enough anticipation that Bulldozer wasn't going to shine, how much doing a simple die shrink of a current design could have cost in time and money to NOT have doing so instead of all the worthless Bulldozer hype that just hurted AMD?


I think that AMD strategy was a total screw up of things: Bulldozer is quite dissapointing for general Desktop performance, generally not worth being called an upgrade over a 45nm K10. However, considering that on Servers Bulldozer could actually be much more competitive due to the abundance of Multithreaded workloads, it would have been better if AMD efforts concentrated on providing Bulldozer for Servers and still rely on K10 for Desktop yet another generation. Its what AMD did back on K8 launch: Opteron first, Athlon 64 almost half a year later while Bartons were getting owned by Northwood C. I don't understand what AMD had to win by releasing Bulldozer for Desktop in its current incarnation considering that is the market where less chances it had to shine, though I didn't saw Reviews of how Bulldozer does on Server to know if at least it holds it ground on that market.

[BeepBeep2]

Even for servers, I dont see how BD is a win.
16 core server chips, they could have shrunk Magny Cours and improved clockspeed a few hundred Mhz or added 4 more K10 cores.
They should have added Llano 3-5% improvements plus 32nm shrink on X6, add in 200-300 Mhz headroom and called it a day.

Anyone saying Bulldozer isn't as bad as Phenom I launch needs to stop drinking Kool-Aid and check facts unfortunately.

I'm not saying it isnt fun to OC though, but other than that there is no logical reason to buy the product.

[EvilBlitz]

Those projected % increases vs llano, if you actually read the slides they have a 1 next to both of them. In both cases it states this is for digital media workloads, NOT ipc.

Still it has magically increased. Personally I think it is just smokes and mirrors marketing bs. I bet there will basically minimal change in performance for piledriver vs bulldozer. These large % differences AMD are claiming I think are just selected benchmarks. I.E the ones that already do well for Bulldozer vs Thuban.

I doubt GFs process has improved that much, maybe a little but certainly not a lot. When the supply of AMD chips starts rapidly improving then you will see they are getting on top of yields and process peformance.
If they get the process issues really sorted, then I think we could start seeing some really good results.

[charged3800z24]

Even for servers, I dont see how BD is a win.
16 core server chips, they could have shrunk Magny Cours and improved clockspeed a few hundred Mhz or added 4 more K10 cores.
They should have added Llano 3-5% improvements plus 32nm shrink on X6, add in 200-300 Mhz headroom and called it a day.

BD added new Instruction sets which in proper bench marks, show how much better BD is then Phenom II. I know, not a lot of applications take advantage of these yet, but soon will. Now it Thuban could have been shruck, added Instruction sets and bumbed the clock speed... It would have been a nice chip.

[cesariuth]

Thanks undone !





FM1 & FM2

I think that models ES of Trinity don't have the improved of Pelidriver core. I can see in the slide the date of October and in this month AMD launched BD, then these ES models of Trinity have Bulldozer core not PD core.

The best of these ES models have the perfomance of FX-4100 and this is equal at the performance of A8-3850 in CPU.

I hope with the improved of 10-15% IPC and little better more MHz (or better Turbo core) We will see the 20 % more performance than Llano. 30% is much and I think is a old prediction of AMD when they expected more performance for BD.