AMD FX-8150 Bulldozer finally tested

[Dresdenboy]

Yes , for me, it will be failure if it cant reach the same IPC as its predecessor, same as P4 was compared to P3. Because every singel speed demon design for the consumer market was a failure. ST performance is still of significant relevance for the Consumer market.

P4 took over because P3 couldn't go any further as a single core. P4 also caused K7 to lose marketshare.

But for a throurough look at this topic I might recommend taking an course covering microarchitectures. OTOH I realized that car technology is much better known in the public. First on understanding cars: Who knows, that cars now usually have hundreds of small processors? That they have many communication networks (e. g. as CAN, Flexray)? That for releasing an airbag the controllers in some cars partly calculate algorithms belonging to the class of artificial intelligence algos (e. g. a neural network trained to detect a happening crash during the first milliseconds and predicting the maximum impact)? That physically relatively small engines reach higher hp and torque numbers than the larger engines in the past thanks to lots of software and hardware improvements? It got really complicated nowadays. Yet we still talk about them based on a view variables.

Now imagine Bulldozer being such a newly developed car. It has 8 cylinders, a different gearbox and so on. Now put in an experienced driver, who used to drive small cars. Would he drive as well as a driver trained to the new car? You surely guessed that the driver represents the software. It looks like we still have to wait for better drivers than the current ones.

[BoredByLife]

P4 took over because P3 couldn't go any further as a single core. P4 also caused K7 to loose marketshare.

But for a throurough look at this topic I might recommend taking an course covering microarchitectures. OTOH I realized that car technology is much better known in the public. First on understanding cars: Who knows, that cars now usually have hundreds of small processors? That they have many communication networks (e. g. as CAN, Flexray)? That for releasing an airbag the controllers in some cars partly calculate algorithms belonging to the class of artificial intelligence algos (e. g. a neural network trained to detect a happening crash during the first milliseconds and predicting the maximum impact)? That physically relatively small engines reach higher hp and torque numbers than the larger engines in the past thanks to lots of software and hardware improvements? It got really complicated nowadays. Yet we still talk about them based on a view variables.

Now imagine Bulldozer being such a newly developed car. It has 8 cylinders, a different gearbox and so on. Now put in an experienced driver, who used to drive small cars. Would he drive as well as a driver trained to the new car? You surely guessed that the driver represents the software. It looks like we still have to wait for better drivers than the current ones.

Or this explains it:

http://www.xbitlabs.com/news/cpu/dis...er_Fiasco.html

[FlanK3r]

maybe yes, maybe not....

[FischOderAal]

Now imagine Bulldozer being such a newly developed car. It has 8 cylinders, a different gearbox and so on. Now put in an experienced driver, who used to drive small cars. Would he drive as well as a driver trained to the new car? You surely guessed that the driver represents the software. It looks like we still have to wait for better drivers than the current ones.

Ein Autovergleich... Jetzt fehlt nur noch Hitler in diesem Thread.

[haylui]

Or this explains it:

http://www.xbitlabs.com/news/cpu/dis...er_Fiasco.html

I think both Intel and AMD are already adapting automated design software to speed up the design. But maybe it is just that the engineers will do manual tweaking/routing/fine tuning in critical parts.
If engineers already realized that the automation tools will bring 20% larger die space and 20% less efficient, surely they would do something about it. Unless there is no one left in the team could do manual tweaking at all.

[Opteron146]

I think both Intel and AMD are already adapting automated design software to speed up the design. But maybe it is just that the engineers will do manual tweaking/routing/fine tuning in critical parts.
If engineers already realized that the automation tools will bring 20% larger die space and 20% less efficient, surely they would do something about it. Unless there is no one left in the team could do manual tweaking at all.

I still doubt the rumor. In my opinion, he mixed up things with Ontario. That chip is indeed the result of automated tools. You can clearly see it by the strange floorplan, it is totally irregular. However, to the contrary, Bulldozer's floorplan is very modular / rectangular, even inside the cores. That's normally the result of handcrafted design. Just compare it with Ontario and the difference is imminent.

Furthermore, Ontario is a success and has a very small die-size and a competitive power consumption. Actually I would even say that it is currently AMD's best chip. Small, cheap to produce and it should sell very well, the typical cash cow.

[STEvil]

P4 took over because P3 couldn't go any further as a single core. P4 also caused K7 to loose marketshare.

But for a throurough look at this topic I might recommend taking an course covering microarchitectures. OTOH I realized that car technology is much better known in the public. First on understanding cars: Who knows, that cars now usually have hundreds of small processors? That they have many communication networks (e. g. as CAN, Flexray)? That for releasing an airbag the controllers in some cars partly calculate algorithms belonging to the class of artificial intelligence algos (e. g. a neural network trained to detect a happening crash during the first milliseconds and predicting the maximum impact)? That physically relatively small engines reach higher hp and torque numbers than the larger engines in the past thanks to lots of software and hardware improvements? It got really complicated nowadays. Yet we still talk about them based on a view variables.

Now imagine Bulldozer being such a newly developed car. It has 8 cylinders, a different gearbox and so on. Now put in an experienced driver, who used to drive small cars. Would he drive as well as a driver trained to the new car? You surely guessed that the driver represents the software. It looks like we still have to wait for better drivers than the current ones.

Do you realize how long it took before dual-core P4's came along? Intel could have put two or more P3 die's together if they wanted, but that would have canibalized their server side at the time.

P4 was not about going dual core.

[BeepBeep2]

Do you realize how long it took before dual-core P4's came along? Intel could have put two or more P3 die's together if they wanted, but that would have canibalized their server side at the time.

P4 was not about going dual core.

Furthermore, P3 did in fact go further as a single core after P4's release.

[naokaji]

Now imagine Bulldozer being such a newly developed car. It has 8 cylinders, a different gearbox and so on. Now put in an experienced driver, who used to drive small cars. Would he drive as well as a driver trained to the new car? You surely guessed that the driver represents the software. It looks like we still have to wait for better drivers than the current ones.

Why should we look at potential performance with software that doesn't exist instead of real one? its about as useful as non real world benches.
3dmark and such can be fun as toys, but they do not represent reality, just like software specifically tweaked for a certain architecture does not represent the software used by consumers every day.

[zir_blazer]

And please let K10 die already, How do people know a 32nm would be better? A K10 in 32nm would have zero issues? Would be able to reach higher frequencies?

No one knew how a Northwood shrink on 90nm would do compared Prescott, but we DO have a 32nm K10 and its called Llano. Llano should be slighty faster than 45nm K10 because it had some minor architectural improvements, but is hard to directly compare to them because besides that you would have to isolate the CPU part from the GPU for any serious comparision (Maybe very easily done with a discrete Video Card, but we don't know if the IMC servicing the CPU only is as good as previous ones) and the features differs from all the others. You can't directly put it against Denebs or Thubans: You have twice the Cache L2, but no Cache L3, and are limited to Quad Core. However, you could make interesing IPC based comparisions if you picked an Athlon II X2 Regor (That got 1 MB Cache L2 per Core) against a Llano with two Cores disabled.
We also don't know the true headroom potential of Llano because there is no way to overclock it without hitting a Base Clock wall as every other Bus derives its Frequency from it, so anything could be holding you back (Including Llano very own GPU). If the supposed model with the Unlocked Multiplier shows up, interesing comparisions on Llano true CPU scaling could be made. If Deneb C3 was 3.8 GHz capable (Forget going beyond it, power consumption gets ugly), I don't see why Llano couldn't reach at least the same values, and maybe 200 MHz more, with better power consumption. Basically, Llano could put Bulldozer even to more shame.
It would be a hard pick though. I don't see enthusiasts adopting Socket FM1 even if Llano has potential as a Bulldozer alternative. You would be losing Thuban 2 extra Cores, the Cache L3, and maybe even if you don't miss Bulldozer, chances are you want to stick Piledriver in your current AM3+ Motherboard.

You haven't played with Llano have you? ( a 4 Core processor that can't get past 2.9Ghz )

Besides that because the platform wasn't designed for overclocking as you can't currently isolate Llano CPU potential without messing with everything else, under the limited TDP you have both a CPU and a strong GPU, that's the reason for the conservative Frequencies. And considering that AMD is segmenting FM1 as a value/mainstream platform and AM3+ as the enthusiast one, they don't have any real reason to crank up Llano Frequency or putting it too close to Bulldozer.



I'm dissapointed about Bulldozer as a whole. After hearing JF-AMD insisting on Bulldozer having higher IPC (Something that we could consider have considered set on stone coming directly from AMD), I was expecting something consistently superior to K10 and instead we got something that is noticeabily slower. The only way that IPC is higher is if they're comparing an entire Bulldozer Module against a single K10 Core. However, there are some interesing things: Bulldozer got 2000 Millions Transistors at 4 GHz and at nominal Frequency boast a respectable power consumption. However, Bulldozer is pretty much at the top of the Frequency/Voltage curve, this is also the reason why the power consumption gets ridiculous crazy with just a moderate overclock. Not only so, the 2000M Transistors are very densely packed:

Bulldozer 8C 2000M? / 315 mm^2 = 6,35
Llano 4C 1450M / 228 mm^2 = 6,36
Gulftown 6C 1170M / 240 mm^2 = 4,88
Clarkdale 2C 384M / 81 mm^2 = 4,74
Sandy Bridge 4C 995M / 216 mm^2 = 4,61
Sandy Bridge 2C (GT2) 624M / 149 mm^2 = 4,19
Sandy Bridge 2C (GT1) 504M / 131 mm^2 = 3,85

How much does the Transistor density potentially hurts yields or Frequency scaling? I suppose that such 35% higher density compared to Sandy Bridge could be a pain to handle by the fresh process at Global Foundries, and this applies to both Llano and Bulldozer.
Anyways. What dissapoints me is that no matter how faster it was supposed to be compared to a Core i5 or i7, the point is that Bulldozer can't consistently beat what it was mean to replace and you don't need Intel competing when AMD older Processors put it to shame. Not only that, but I doubt many people got enough knowledge on the particularities of Bulldozer to determine the sum of things that it is lacking before it can bring real competitive performance. Maybe one Stepping or two, like for Barcelona TLB bug? It could improve Frequency headroom and maybe fix anything that could cause subpar performance on a subsystem, like the Cache performance. Maybe an architectural revision, requiering us to wait for Piledriver so it does what Stars did for Barcelona? Or is the design flawed and unworkable and maybe we could see a K10 variant at 22nm making a comeback P6-style?

[Sparky]

After hearing JF-AMD insisting on Bulldozer having higher IPC (Something that we could consider have considered set on stone coming directly from AMD) [...]

Just as a side note, he did have in his sig that while he works for AMD, what he posts is NOT the word of AMD and not official in any way. He posted on the side, as he saw things, not as part of his job.

[haylui]

I still doubt the rumor. In my opinion, he mixed up things with Ontario. That chip is indeed the result of automated tools. You can clearly see it by the strange floorplan, it is totally irregular. However, to the contrary, Bulldozer's floorplan is very modular / rectangular, even inside the cores. That's normally the result of handcrafted design. Just compare it with Ontario and the difference is imminent.

Furthermore, Ontario is a success and has a very small die-size and a competitive power consumption. Actually I would even say that it is currently AMD's best chip. Small, cheap to produce and it should sell very well, the typical cash cow.

Just assume, AMD really do it with automation tools. Before the processor could be launched, there is testing for the chip. When the performance turns out to be worse than Phenom II in some cases, do you think, their design engineers do not know about it?
If they know it, what makes them not tuning it?(this is not stated in the report)
I have doubt about the insider news too.
Or he really thinks that his colleagues are really dumb? lol

[zir_blazer]

Just as a side note, he did have in his sig that while he works for AMD, what he posts is NOT the word of AMD and not official in any way. He posted on the side, as he saw things, not as part of his job.

If I worked at some place and say in public a piece of data that is not protected under NDA (While I know all the other details I can NOT say to be able to reach and sustain such a conclusion), you are indeed going to believe me much, much more that some random guy with an Engineering Sample leaking results. I don't think he could have stated something without knowing if it was true or false as he knew all the details we didn't, this is why I don't get why he could have insisting soo firmly in the "IPC increases" thing if it wasn't the case. Maybe he was comparing a Bulldozer module against a single K10 Core, that is the only way you can make sense of it.
Also, he was quite accurate with the statement that Bulldozer wasn't compatible with the standard AM3 platform and at that moment I think most believed that it could been a drop-in replacement.

[gumballguy]

If I worked at some place and say in public a piece of data that is not protected under NDA (While I know all the other details I can NOT say to be able to reach and sustain such a conclusion), you are indeed going to believe me much, much more that some random guy with an Engineering Sample leaking results. I don't think he could have stated something without knowing if it was true or false as he knew all the details we didn't, this is why I don't get why he could have insisting soo firmly in the "IPC increases" thing if it wasn't the case. Maybe he was comparing a Bulldozer module against a single K10 Core, that is the only way you can make sense of it.
Also, he was quite accurate with the statement that Bulldozer wasn't compatible with the standard AM3 platform and at that moment I think most believed that it could been a drop-in replacement.

Must have been all those posts by Terrace that did it.

JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

terrace215 post: IPC decreases, The more I post the more it decreases.
terrace215 post: IPC decreases, The more I post the more it decreases.
terrace215 post: IPC decreases, The more I post the more it decreases.
.....}
until (interrupt by Movieman)


Regards, Hans

Guess the engineers couldn't work out why it was going wrong, huh?

[stangracin3]

i am really getting tired of that getting posted 1000 times and jf-amd getting blamed for terrace getting banned. terrace was banned because he couldn't keep his mouth shut plain and simple. and with him being banned we aren't even supposed to be mentioning his name. yet if we were to mention obr's name in a bd thread half the people would jump on you. but no its ok to talk about terrace all we want.
/rant

[Drwho?]

I'd rather search for "GenuineIntel" in the exe file. For example at these positions (for the 64b binary):

006F6595, 006F65A4 & 006F65AE.

There are these commands:

cmp eax,0756E6547
cmp eax,049656E69
cmp eax,06C65746E

The hex numbers translated, from bottom to top:
"letn Ieni uneG"

Now read form right to left ... ;-)

What's the purpose of this?

I have to admit however, that there is not much performance difference on a AMD K10. Just wonder what it is doing there ...

you copy and past too much the WEB ...
this is the code that test the CPU to report and compare the CPU on the left of the application (yeap ... there is actually a good reason to read the cPU in Cinebench) ... check how many time if you actually tested yourself on cinebench, you ll see if is only very few times.

cheap inaccurate propaganda, really ...

Francois
here is what you google to try to make your point:
http://www.google.com/#sclient=psy-a...w=1920&bih=979

PS: not answering to this anymore, it is not worse my time and energy when people only try to find problems, or invent them

[Dresdenboy]

Do you realize how long it took before dual-core P4's came along? Intel could have put two or more P3 die's together if they wanted, but that would have canibalized their server side at the time.

P4 was not about going dual core.

Exactly the area (cost) and power consumption were preventing both archs to introduce them as dual cores that early, since this at least required some optimization for energy efficiency (OTOHit's possible to have 2 dies running at 0.7x frequency in the same power envelope) and/or a newer process (to solve area and power).

[Opteron146]

you copy and past too much the WEB ...

No, to the contrary, I did not search enough in the web, because then I would have saved some time.
I dont speak Russian, but your second google hit is from me, I also examined a boinc binary, which inhibited the use of SSE2@AMD chips. The "clean" binary upps the performance +10% on AMD CPUs, nice plus.

this is the code that test the CPU to report and compare the CPU on the left of the application (yeap ... there is actually a good reason to read the cPU in Cinebench) ... check how many time if you actually tested yourself on cinebench, you ll see if is only very few times.

I believe you, because the performance differences for cinebench are very small (none of the aforementioned 10% as in case of the other program).
But if you state that it is only for naming the chip correctly on the left side of cinebench, then I wonder why they compare to a hardcoded Intel string, and not just read out the CPUID by using the cpuid command and copying the results from the respective return value registers. Well i conclude wired programming style then.

cheap inaccurate propaganda, really ...

Hmmm sounds like a cheap insult to me now, really. Please show some respect, merci.

PS: not answering to this anymore, it is not worse my time and energy when people only try to find problems, or invent them

Your free wish, however, if you don't want to discuss, don't start to post on a discussion board ;-)

I thank you for your time then, take care and

Au revouir

[Hornet331]

Always cool to blame intel rather then the lazy coders... why do they use a compiler form 2008 (or older) in 2011, why they don't set flags, which would put minimum execution path to SSE2?... why they don't give response to people pointing this out?

To me its seems many coders don't care at all for optimisations... Imho the best case was seti.. the best binaries came form the comunity who made binaries for each architecture by themself..

[gallag]

i am really getting tired of that getting posted 1000 times and jf-amd getting blamed for terrace getting banned. terrace was banned because he couldn't keep his mouth shut plain and simple. and with him being banned we aren't even supposed to be mentioning his name. yet if we were to mention obr's name in a bd thread half the people would jump on you. but no its ok to talk about terrace all we want.
/rant

As you said, he got banned for continually stating the same thing and arguing his point with jf and the fans, turnes out he was right.

[Opteron146]

Always cool to blame intel rather then the lazy coders... why do they use a compiler form 2008 (or older) in 2011, why they don't set flags, which would put minimum execution path to SSE2?... why they don't give response to people pointing this out?

Very good question, I contacted them and never got a reply. I guess the answer is easy, they get it for free and don't have to pay the power bills.

To me its seems many coders don't care at all for optimisations...

Yes, but then - why are they using ICC in the first place and not stick to the standard MS compiler? Seems they care, somehow - weird.

[Manicdan]

As you said, he got banned for continually stating the same thing and arguing his point with jf and the fans, turnes out he was right.

its not the message, is how you push the message. if i walk into every intel post and say that the next intel chips are going to be overpriced and useless for mainstream, i have every right to believe that, but i dont have the right to flamebait in every thread with that idea.

[gallag]

If what you are saying is true and people are saying you are wrong then you do have the right to argue your point, remember it always took more than one person to argue, jf could have said "we will see" and let time dictate who was right, jf argued strongly that terrace was wrong and terrace argued back.

[Sparky]

Oh please

Knock it off.

[Andrew LB]

If I worked at some place and say in public a piece of data that is not protected under NDA (While I know all the other details I can NOT say to be able to reach and sustain such a conclusion), you are indeed going to believe me much, much more that some random guy with an Engineering Sample leaking results. I don't think he could have stated something without knowing if it was true or false as he knew all the details we didn't, this is why I don't get why he could have insisting soo firmly in the "IPC increases" thing if it wasn't the case. Maybe he was comparing a Bulldozer module against a single K10 Core, that is the only way you can make sense of it.
Also, he was quite accurate with the statement that Bulldozer wasn't compatible with the standard AM3 platform and at that moment I think most believed that it could been a drop-in replacement.

Now you're just making excuses for AMD.

I think it's more than likely that Jeff was simply fed inaccurate information from people higher up in the company... which leads me to believe one of two things. Either management is completely clueless about the architecture of Bulldozer and internal performance estimates, and due to incompetence would just tell Jeff what he wanted to hear to hurry his departure from said office. OR.... someone in management was FULLY aware of how Bulldozer would perform and perhaps didn't really like Jeff very much, thus giving him incorrect date AND putting office politics before the image of the company.

Neither are that far fetched. I personally think the latter is most likely considering I once was in that exact same situation a few years back.