AMD FX-8150 Bulldozer finally tested

[Hornet331]

Oh great, so now were back to complier issues. Jeff Bridges in Into the Night, "now you don't know what to believe".

RussC

Was only a matter of time... meanwhile majority of the programmers don't care and still use the common compilers like MSVC, GCC, open64 etc. Intels marketshare in the compiler market is ~10%, hardly worth crying about it. Most ppl on windows use MSVC. And even the recent cinebench version refrains form using intel only optimisations.

And its not like you can't force ICC to use appropirate codepath with flags...
But I am not suprised at all.. the hardcore fanbase recovered from the shock and now is in search for "appropriate" applications for BD that show the "real value" of BD... and only these are valid form now on.

[Drwho?]

Well, BD is very similar to Prescott in many ways, it is very very sensitive to the code quality, due to the fact that each thread of a core only have 2 large decoder, the front end is very limited, and you have to wait for more decode steps to feed your out of order more parallelism opportunity.

This is the major difference with hyper threading, where each thread can get up to 5 large decoding. This cause heavy dependancy on the code scheduling for BD, this is fairly hard to overcome without adding more hardware on each side of the BD decoder ... I am sure that for the last 2 years, AMD has been trying to overcome this .... The problem is that it will cost even more transistors and dice space ==> $$$

This is without counting with the register files of the FP units that need to be dispatch too to each side of the int pipelines. Many opportunity for locking issues there too.

BD will stay very sensitive to code quality as long as the front end is not 4 large on each side of the threads, this is the bottom line.

Hope it is ok to share my point of view and personal analysis of the performance issues.

It is ok to disagree ;-)

[Hondacity]

nice ucpu talk

[god_43]

Well, BD is very similar to Prescott in many ways, it is very very sensitive to the code quality, due to the fact that each thread of a core only have 2 large decoder, the front end is very limited, and you have to wait for more decode steps to feed your out of order more parallelism opportunity.

This is the major difference with hyper threading, where each thread can get up to 5 large decoding. This cause heavy dependancy on the code scheduling for BD, this is fairly hard to overcome without adding more hardware on each side of the BD decoder ... I am sure that for the last 2 years, AMD has been trying to overcome this .... The problem is that it will cost even more transistors and dice space ==> $$$

This is without counting with the register files of the FP units that need to be dispatch too to each side of the int pipelines. Many opportunity for locking issues there too.

BD will stay very sensitive to code quality as long as the front end is not 4 large on each side of the threads, this is the bottom line.

Hope it is ok to share my point of view and personal analysis of the performance issues.

It is ok to disagree ;-)

interesting analysis, but from my own "limited" understanding of these things, bd has more differences than similarities with regards to Prescott? so maybe the solution is not as extreme? if the apparent issues are from the design and not the process, then why did amd continue with it? i mean; amd had 4+ years to figure this out? surely they had samples before this year?

too bad we dont have an amd engineer on these boards as well.

[Hondacity]

4yrs is not even enough if their r&d team is not versed like Francois

I met the israeli r&d intel guys..they were supreme beings

[ajaidev]

4yrs is not even enough if their r&d team is not versed like Francois

I met the israeli r&d intel guys..they were supreme beings

I went to the Intel complex for a week to work on some Atom crap. The guys there are really awesome they have a multi source projector in their lobby office and not only that they also have mini refrigerators "I think they were did not open one up" in almost every office.

The people there really helped me make a home there for the week....

[Jimmer411]

how can 2 billions transistors be so SLOW?
sad, very sad day

I really hope that piledriver is not that bad...

Still don't understand why does movieman said that AMD have a winner. This is not a winner in any way you look at it

I'm sad.

I would have probably done the same thing if AMD flew me over and gave me free hardware. Id bet money we never see his review...

[dartaz]

[Movieman]

I would have probably done the same thing if AMD flew me over and gave me free hardware. Id bet money we never see his review...

Time for me to open my mouth when I see things like this.
My comments and "excitement" that I spoke about were based on what I saw when I was in Austin.
The relative performance in games and the few benches I saw looked VERY good to me.
Now yes, AMD did fly me there, put me up in a very nice hotel, fed me VERY well and yes, I came home with a FX8150 chip and a Asus CrosshairV board but ask yourself this:
As much as I appreciated the trip and the invitation do you really think I'd "sell my soul" for $500.00 in hardware or for $5000.00 for that matter?
As to why you haven't seen my review yet it's got nothing to do with any of the above but because of a technical foulup and that my friend is the 100% truth.

[Manicdan]

to prove you cant be bought, give away those goods for free to someone who will appreciate them

*cough cough* *wink wink*

[stangracin3]

I would have probably done the same thing if AMD flew me over and gave me free hardware. Id bet money we never see his review...

he has already said his stuff would sit in the box until the 12th because he would be to tempted to leak anything.

[Tha Last Meal]

AMD FX-8150 Bulldozer......Are you ready for the first processor in the world have 8 core And lost from 4 core!!
this Bulldozer Very cool When you buy this processor You will get many surprises

1- 4 core (2500/2600) can beats your processor
2- very Bad performance with games
3- Power consumption is very high
4- your processor with 1 core Tests = epic fail
5- your processor with OC Will make you cry

And Finally my advise is you need immediately to buy this Bulldozer to be the first man have 8 core processor And lost from 4 core

[qurious63ss]

MM are you upset that AMD used you to hype their product? The reason I ask is because you where quoted in this and other forums as the reason to why BD was going to be great and now this kind of puts you in a spot where you will probably have to defend your comments about BD from now on.

[G0ldBr1ck]

Why is everyone having the same conversation across 4 different threads? Its a pain in the ass to keep up with. Quit making new threads already. Just post it here.

[LagunaX]

Actually looks like it's not so bad (if you are upgrading an AMD) if the following occur:
1) run it on windows 8 or get an instruction patch for windows 7,
2) lower the price a little,
3) disable the b2 cluster set in bios ( run it as quad so the shared cache order doesn't fubar you),
4) overclock it to 4.8-5.0ghz as appropriate for this forum.

Performance will be better and power consumption will be lower.

[zalbard]

The problem is that it will cost even more transistors and dice space ==> $$$

It's already 2B, which is insane...

BD will stay very sensitive to code quality as long as the front end is not 4 large on each side of the threads, this is the bottom line.

And I don't see a lot of consumer grade applications getting optimised for BD, since it's made by AMD and its performance is poor.

1) run it on windows 8 or get an instruction patch for windows 7

Intel CPUs benefit from improved scheduler as well.

2) lower the price a little

2B transistors, plus AMD needs to pay for 5 years of R&D... So not by much.

3) disable the b2 cluster set in bios ( run it as quad so the shared cache order doesn't fubar you)

MT performance will be even further away from Phenom II x6 then...

4) overclock it to 4.8-5.0ghz as appropriate for this forum.

Hardly possible without extreme heat and volts. And some chips simply can't make it there...

[Opteron146]

Well, BD is very similar to Prescott in many ways, it is very very sensitive to the code quality, due to the fact that each thread of a core only have 2 large decoder, the front end is very limited, and you have to wait for more decode steps to feed your out of order more parallelism opportunity.

No, the front is vertical multi threaded, i.e. every clock 4 decoders to one thread, in the next clock to the other. If the 2nd thread does not decode anything, obviously the other thread can have the front end longer than 1 clock cycle ;-)
bulldozer4b.jpg

This is the major difference with hyper threading, where each thread can get up to 5 large decoding.

How do you count to 5 now? Do you include the Macro Op Fusion, too? There are only 3fastpath plus 1 complex decoder in Intel's design. Officially they count 4:
32_m.png
Anyways, MacroOpFusion is used with Bulldozer, too now, so you have to count 5 for AMD, too (however in less cases, AMD's fusion is on the Conroe's level, Nehalem got more fusion capabilities, not sure about Sandy now.)

BD will stay very sensitive to code quality as long as the front end is not 4 large on each side of the threads, this is the bottom line.

As said above, each thread has 4 or if you count Fusion then 5 decoders. How is intel running Hyperthreading on the 3+1 decoders? Each thread gets 4 decoders, so 8 total? That would be new to me and intel. If intel does it in another way than AMD, then they have to run both threads simultaneously. However, that would mean "only" 2 decoders for each thread, and that's exactly the baaaad case you wrote about above in your incorrect statement about AMD's decoder in the beginning.

Hope it is ok to share my point of view and personal analysis of the performance issues.
It is ok to disagree ;-)

Discussion is always fine, however in the above case, I assume you are rather wrong.

cheers

Opteron

[Olivon]

As to why you haven't seen my review yet it's got nothing to do with any of the above but because of a technical foulup and that my friend is the 100% truth.

What's your technical foulup Dave ? BOINC numberz are too low ?

[Judaeus Apella]

I ordered a BD the second Tiger had them.... then I saw everyone freaking out about how bad its performing, from what I understood is the lack of current motherboards to utilize them correctly. So I unfortunately had to cancel it. I'm trying to build a graphics station for someone else so yeah... didn't want something buggy. Shame. Well at any rate if anyone wants one Tiger Direct should have one left since I cancelled my order. Well... all I can hope for is things will get sorted out by the time the Piledriver comes out. Dammit...

[tajoh111]

As I remember Movieman didn't test the system or use the parts until the 12th. So he is pretty much innocent in regards to prehype.

What happened to movieman and the rest of us, is we were explicitly lied too by AMD marketing department, who cannot get enough criticism. They lied to such an extent, that they cannot be trusted again, considering the impact it has had on our purchases. Movieman was bound by NDA and could not release results from the actual hardware. On top of that, due to the favorable treatment AMD gave him, he was more inclined to believe AMD was not lying to him. They treated him nice with an ulterior motive. Most of us have fallen for this at some point.

A lot of us believed the AMD hype, which is understandable considering the research time and the complexity/size of the chip. BD has twice as much transistors/cores as sandy bridge(and sandy bridge has a IGP built into it) and should perform much better than it does. Most of us if we looked at what amd has released to the public prior to the information released(and not taking into account stuff indirectly related(like executives losses, stock drops and etc), shown BD to be a good chip.

If AMD flew you out, put on an event that made you feel like a king, and put on a marketing speel that was designed to fool the participants involved into thinking BD was a very good product. Most of us would believe AMD, except the very sceptical or intel Fanboyish.

Movieman never tested the stuff prior to October 12 and the only stuff he had to go on without breaking NDA or even being unfair by testing unreleased hardware, was the stuff AMD told him. That's the bottomline.

[LagunaX]

LOL I didn't say BD would be stellar or great but just said it looks like it's no so bad after all if you were in the AMD cpu upgrade path...

[naokaji]

BD will stay very sensitive to code quality as long as the front end is not 4 large on each side of the threads, this is the bottom line.

How many companies are going to change their code though for one specific cpu model? With Supercomputers its a non issue cause there you usually have very high optimization of the code towards the specific hardware used, but for mobile and desktop use that is not going to happen on a large enough scale.

[Tha Last Meal]

Performance will be better and power consumption will be lower.

yeah yeah yeah it will happen in 2013

[paulbagz]

I just want to know what all these people supposedly saw when they attended these "behind closed door" testing get togethers and then said things like "oh its going to be awesome " etc etc.

And then it pancaked.

-PB

[Drwho?]

No, the front is vertical multi threaded, i.e. every clock 4 decoders to one thread, in the next clock to the other. If the 2nd thread does not decode anything, obviously the other thread can have the front end longer than 1 clock cycle ;-)
bulldozer4b.jpg


How do you count to 5 now? Do you include the Macro Op Fusion, too? There are only 3fastpath plus 1 complex decoder in Intel's design. Officially they count 4:
32_m.png
Anyways, MacroOpFusion is used with Bulldozer, too now, so you have to count 5 for AMD, too (however in less cases, AMD's fusion is on the Conroe's level, Nehalem got more fusion capabilities, not sure about Sandy now.)


As said above, each thread has 4 or if you count Fusion then 5 decoders. How is intel running Hyperthreading on the 3+1 decoders? Each thread gets 4 decoders, so 8 total? That would be new to me and intel. If intel does it in another way than AMD, then they have to run both threads simultaneously. However, that would mean "only" 2 decoders for each thread, and that's exactly the baaaad case you wrote about above in your incorrect statement about AMD's decoder in the beginning.


Discussion is always fine, however in the above case, I assume you are rather wrong.

cheers

Opteron

I propose you take a simple linear algorithm and run it on one thread, then, count the number of instructions retired, and then, divide by the number of clock ticks ... You ll be surprise ;-)
( make sure your code is totally compute, with 1 to 2 instructions dependancy ... )

Power point are one thing, but measuring and checking yourself is much better ... Otherwise , at 4.2ghz, how could you explain the poor performance of BD on superPI? Low IPC ... Then, ask yourself, if you measure the IPC for each thread, why it never goes about 2 on a single thread ... Please experiment before trying to correct me. I did my homework ;-)


Then , for your intel diagram, you forgot to count code fusion ... SandyB is 4 large + Fusion ... That gives you up to 5!

We saw a lot of powerpoint slide, but the measurement don t match what is showed in the ppt, sorry, you assume the marketing slide are correct, this is where is the gap. I looked for everywhere, I could not find anywhere clearly said that it will decode more than 2 per threads, and match it with an ASM code doing more than 2 IPC , did you try?


Hehe ...

Francois