Delighted? If I'm delighted is at interpreting correctly and making an accurate assesement of BD's performance over 1 year ago. I can't be delighted at AMD's misery or the sorrow experienced by its fans.Originally Posted by duploxxx
What I'm pissed at are the numerous fanboys who constantly booed, insulted and mocked me and others and now have dissapeared without a trace.
And the results are "rather low" only for those who didn't follow the whole saga.
-the uarch was simplified, less execution INT units, FPU shared, longer instruction latencies , loosing 5% IPC for 20% more frequency ( this was the plan )
-the implementation sucked because if was done with synthetised tools ( 20% larger blocks and 20% slower than hand crafted )
-the process is borked, variability is high, yields abysimal and power is out of control ( frequency is lower than expected and parts are more power hungry )
This things were known for a year. Only one who did not want to see the truth could be surprised now at the performance.
They expected the a slight loss in IPC for existing code compensated by the increased frequency. The frequency gains were reduced in the implementation phase due to a high use of automated placing and routing tools, the end result being a part 20% larger and 20% slower than it could have been had it been carefully optimized. Yet, on top of that, the process failed to live to the expectations. It's a whole chain of events which killed BD.
Had everything worked right, taking a base Thuban of 3.3GHz, a 32nm BD should have lost 5% on IPC, gain 20% frewquency by uarch ( 4GHz ) and another 20% from process ( 45->32nm ). We would have had a 4.5-4.8GHz BD with slightly less IPC than a Thuban, in other words a part performing 30-100% ( in AVX/FMA cases ) better than Thuban. What we ended up with is a part that is +/- 10% of Thuban while being hotter.
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