Quote Originally Posted by -Boris- View Post
That's exactly how I look at high frequencies. Leakage grown lineary with transistors but exponentially with frequency, and exponentially with voltage.
Sure, you could use more power consuming logic or drive the single transistors faster to reach higher clockspeeds. But you could just use less logic, thus less transistors, which need to switch during a clock phase. So you get higher clocks w/o increasing power consumption, maybe even lowering it. This is what's AMD's way of going to lower FO4 delays (per pipelinestage).