Quote Originally Posted by Opteron146 View Post
Mainly clock speed due to a less complex design. Maybe also some power constraints, they only use parity check, no ECC, for the L1 that saves some transistors, too.
Is that worth the loss of IPC? IPC usually is a better route than frequency from a power perspective. And frequency gains seems to be small no matter what nowadays so the possibly higher frequencies doesn't seem to make a big impact on the end performance.