i think their initial concern was making a proper module that gives the best perf/mm2 they could. if they on top of that worried about a massive IPC increase, they might have messed up alot of the balancing and created accidental bottlenecks.

i think what will be good to watch is the number of cores for a typical chip (250-300mm2) on each process. the increase is currently showing a rapid increase due to K8 design being slightly updated for almost a decade now, and so with each shrink they can simply pack in more. so in the next decade we can either see chips with 30+ cores as things continue to just double, or we might see a trend leading to a cap as IPC starts to become the main focus.