clocks are spec of architecture. Again:
If company A has product at 2GHz and TDP 95-125W and company B at 6 GHz chip with the same range of TDP, doesnt matter at clocks.
clocks are spec of architecture. Again:
If company A has product at 2GHz and TDP 95-125W and company B at 6 GHz chip with the same range of TDP, doesnt matter at clocks.
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it doesn't. And That is my point. What matters is what that chip is able to do at those 6ghz![]()
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we already know IPC will be higher than phenom, so if BD can reach 5ghz with overclocking, then it will be a significant increase over phenom (like 40% stronger per thread even though clocks are only 25% higher (4ghz vs 5ghz))
most of us think that it will take about 5.5ghz stable on air/water for it to be thread vs thread competitive with a 5ghz SB
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As I have said I am not worried, but BD is not going against phenoms.
So what if it has lower IPC than SB? Will it be a deal breaker if it is 15% slower at similar clock? What matters is a whole performance/power/price/OC headroom package. If it is able to clock 15% higher than SB than with 8 cores it will crush it in MT applications and equal it/come close in single threaded ones. Now factor in LN2 OCing and you will get a beast for 320$ that will probably break some 3dmark/whatever records when launches.
Why is everyone think that I am suddenly talking about how BD will suck because it is designed to clock high? My point is, I do not like when someone says, oh those clocks will surprise everyone. Instead if I heard that performance will surprise everyone that is another deal.
Now 'surprise' for others might not be surprise for us here. Let's say top BD runs at 3.8ghz. That might surprise those who do not follow BD path to release or who do not know as much as we do about CPU arch. But for us those 3.8ghz is just given as logical outcome. We would be questioning AMD if they released BD at 3ghz or something of the kind. Today we have 3.6+ghz CPUs so BD clocks might not be that big of the surprise for us. And we have SB clocking like mad on air, so it is a big shoes to fill I would say in clock department.
^thanks for clearing that up
and your right, 3.8ghz does sound nice for some, but most of us are hoping to see 4.2ghz turbo on stock options
and for OCing, we would all love to see mid 5ghz, and anything less would probably also be kinda disapointing
but given that this is a new arch, on a new process, we have no clue how cold sensitive, or voltage sensitive it will be. so then begs the question, if we could pump in 1.4v and get 6ghz on water, but never break 6.5ghz even on LN2, some of us would be static, while others disappointed, but would that make it a failure? it all depends on who you ask. thats what makes these things so interesting and fun, and also personal, lol
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To be honest, I would be glad if BD 8 core top bin came out at 3.8ghz. It wouldn't be surprise, but I would be glad.
Also did you guys noticed, that AMD BlackOps website has expired? I would have thought that if BD at least can clock like Phenom II on LN2 they would keep that domain in tact.
http://www.bit-tech.net/hardware/cpu...2012-roadmap/1
Looks like AM3+ will be obsolete in like another year?
Considering Llano is FM1, and both the APU and Komodo and Trinity say FMx, I would guess that means that these CPUs will spin off on a new "FM" socket, like FM2.
That doesn't make sense to me considering the fact that FM1 has less pins than AM3+, and that I would hope they transition to triple/quad channel on desktop.
Smile
Attachment 116250
looks, FMx (FM2????) and Komodo will be with integrated SB?
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Integrated SB has already been discussed by AMD:
Attachment 116252
2015 looks exciting! :-D
DB: u right, thx.
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Komodo will have integrated PCie.So a new socket is finally confirmed.Thats good in a way.
If we are to judge by Sepang's features,Komodo is going to have: 6-10 enhanced BD cores(25% more than 8C Zambezi),3ch. IMC,new socket,integrated PCIe. New socket may be compatible between two lines of CPUs: Komodo and Trinity. "Enhanced cores" my bring as little as 5% IPC or it could mean extended ISA support(new BMI,TBM and FMA3).
New socket, finlally AMD gets rid of old AM2/AM3 socket thats been allmost same since Socket 939 with just minor tweaks.
FM2 Socket, Dual/Quad Channel DDR3 or DDR4, no more limitations from this old AM socket, i smell awsomeness
The performance numbers in post 1, is close to correct and that is eather 6 or 8-core chip.
Exactly, different arch's mean different clock range. Even tough some people think "oh l33t, my chip has 6ghz stock clocks and your's have only 3ghz" while 3ghz chip can be faster if it has better design.
Last edited by rintamarotta; 06-15-2011 at 03:39 AM.
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I read somewhere that the next Bulldozer socket and memory controller will add native 3channel support. What's interesting is that this could mean high end server MCM chips will add 6 channel memory support
Now that would be awesome.
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Liking the 3ch potential for any FM2 CPU (aka you can upgrade from highend Trinity to Komodo), but more notably you can see AMD is shifting to a (bi)yearly cycle for motherboards. There's much less incentive to be backwards compatible nowadays, they just drag on the dev process and imply unnecessary concessions.
3ch will be great for the high-end, ~280mm (or so) Trinity, as the upgraded GPU desperately needs bandwidth; the smaller version with 2 cores and a cut down GPU can still work on FM1 and be enough for most notebooks/ITX setups.
But then you can see how AM3+/990X is a dead-end platform (they really want to get I/O on and remove HTT) that's gonna last about a year or so, maybe a bit more IF AMD releases any Komodos with AM3+ support- unlikely though.
I think it's 8 core performance projection(in 1st post).And it looks great. What I want to know is whether the software partners will introduce the support for Bulldozer's ISA at launch?Think what FMA4 will do for HPC apps... 1.5x+ boost over legacy/AVX code is awesome potential speedup.
@Dimitriman
Terramar is going to have the same 4ch. memory controller.Sepang on the other hand will support 3ch. IMC.
Komodo is a CPU,but seems to integrate PCIe so it needs a new socket that will in turn accept also the Fusion Trinity class of APUs.
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