MaximusIV-Extreme Thread

[Raja@ASUS]

Thanks for the clarification!

BTW, can you send me RTL Calculator for Sandy Bridge, the link you posted earlier doesn't work.

I took it down for now DM, may repost later if need be. It sets up pretty well on SNB...

-Raja

[donmarkoni]

I took it down for now DM, may repost later if need be. It sets up pretty well on SNB...

-Raja

OK, got it. Thanks anyway. I was just curious, as I like to learn stuff.

[Sauron_Vie]

The SA will have mc access (it's role appears to be of an IO hub at first approximation), but not to the extent where overvoltage of that rail affects memory bus IO margins - the actual IO voltage is VCCIO.

-Raja

thx for clarification. as i said above.

[Raja@ASUS]

No problem, glad it made things a bit clearer for you guys.

-Raja

[subzero 1979]

i have a strange problem my cpu boots on windows @5600
with intelspeedstep and c1e on
with this settings off i have a black screen and system hang ups
what i can to do?

marvell controller no wo rks good with cpu at high frequency
and corrupts my windows

i have better pcmark 05 score @5440=40200
a 5600 i have only 40100!!!!

[Raja@ASUS]

i have a strange problem my cpu boots on windows @5600
with intelspeedstep and c1e on
with this settings off i have a black screen and system hang ups
what i can to do?

marvell controller no wo rks good with cpu at high frequency
and corrupts my windows

i have better pcmark 05 score @5440=40200
a 5600 i have only 40100!!!!

Hi,

Change the multiplier in Windows if you can. Your CPU is unstable at maximum frequency so does not manage to get to the desktop. I am not sure on why the score drops - could be a number of things.

-Raja

[subzero 1979]

thank you RAJA

[miahallen]

I am a little confused with some contradictions:


Yet, in the BIOS it says "memory controller" under VCCSA. Also, miahallen did a 5.1GHz run for LinX club with RAM at 2220MHz and VCCSA at 1.131V, so it looks like VCCSA IS for memory controller? Or I'm a wrong?

Just to confirm the implications...I did test with the VccIO at 1.2V and the SA at "auto" and the test failed....also, with both on auto, the test failed. The only way for the test to pass was with SA boosted.

The SA will have mc access (it's role appears to be of an IO hub at first approximation), but not to the extent where overvoltage of that rail affects memory bus IO margins - the actual IO voltage is VCCIO.

-Raja

I get the impression the manufacturers aren't even sure
Raja, is there a chance Gigabyte and Asus have the VccSA & VccIO labels swapped in the BIOSes?

[donmarkoni]

Just to confirm the implications...I did test with the VccIO at 1.2V and the SA at "auto" and the test failed....also, with both on auto, the test failed. The only way for the test to pass was with SA boosted.

Thanks for the confirmation.

I get the impression the manufacturers aren't even sure
Raja, is there a chance Gigabyte and Asus have the VccSA & VccIO labels swapped in the BIOSes?

I was under same impression, about the swap, but without enough credibility to dispute Asus, I wound look like just being a smarta$s.

[Raja@ASUS]

I get the impression the manufacturers aren't even sure
Raja, is there a chance Gigabyte and Asus have the VccSA & VccIO labels swapped in the BIOSes?

Don't have any GBT boards here so can't say about what their boards do. VCCIO pretty much tells me what it is - IO voltage. The SA role is as an IO hub and the memory controller sits as a side unit (any interconnects will be driven by IO voltage)

Check here:

http://www.anandtech.com/show/3922/i...ture-exposed/4

Should add that on our boards my memory clocking results are all tied to VCCIO - and that's with Hypers running past DDR3-2100. On top of that remember the pin location for voltage rails is well stipulated - so the voltage labelling is correct.

-Raja

[Praz]

Should add that on our boards my memory clocking results are all tied to VCCIO - and that's with Hypers running past DDR3-2100. On top of that remember the pin location for voltage rails is well stipulated - so the voltage labelling is correct.

-Raja

Same here. Stability with PSC memory at 2300MHz require a bump in VCCIO. VCCSA changes does nothing for me.

[Raja@ASUS]

Yeah Praz, that's about right. There maybe some DC coupling internally that leads to an optimal delta between VCCSA and IO, but I have not seen it and that was with my chip running down at -100, too. On top of that on Z68 tying the two rails is allowed which takes the suggestion of any such delta out of the equation under all normal operating conditions.

-Raja

[subzero 1979]

its safe to run vccio ! 1.2?

[Raja@ASUS]

its safe to run vccio ! 1.2?

Most CPUs don't need that much to run a decent memory speed.

-Raja

[miahallen]

Don't have any GBT boards here so can't say about what their boards do. VCCIO pretty much tells me what it is - IO voltage. The SA role is as an IO hub and the memory controller sits as a side unit (any interconnects will be driven by IO voltage)

Check here:

http://www.anandtech.com/show/3922/i...ture-exposed/4

Should add that on our boards my memory clocking results are all tied to VCCIO - and that's with Hypers running past DDR3-2100. On top of that remember the pin location for voltage rails is well stipulated - so the voltage labelling is correct.

-Raja

To quote anand in your link:

The System Agent houses the traditional North Bridge. You get a 16 PCIe 2.0 lanes that can be split into two x8s. There’s a redesigned dual-channel DDR3 memory controller that finally restores memory latency to around Lynnfield levels (Clarkdale moved the memory controller off the CPU die and onto the GPU).

The SA also has the DMI interface, display engine and the PCU (Power Control Unit). The SA clock speed is lower than the rest of the core and it is on its own power plane.

Seems to me that anand is saying the SA voltage would control the IMC voltage, since they're in the same power plane.

Raja, is it possible my results were different than yours due to the D1 ES CPU I was testing with?

[Raja@ASUS]

To quote anand in your link:

Seems to me that anand is saying the SA voltage would control the IMC voltage, since they're in the same power plane.

Raja, is it possible my results were different than yours due to the D1 ES CPU I was testing with?

The core voltage for a functional unit is not the same thing as the transceiver IO or termination voltage for any associated signal line (unless engineered in such a way). It is the IO voltage that is important for overclocking as that drives the transceivers which receive and send data. Think of it as vIOH and VTT. The placement of the memory controller was never in doubt - my opening response said that it sits to the side but the interconnect will be driven by the IO voltage. The main thing here is to understand the role of IO.


I never used the D1s myself, there may be some differences but they would not be that large as to flip the role of the IO rail. Either way, I suggest you have another in-depth play with some boards and CPUs and see for yourself which voltage has the impact on memory clocking.

-Raja

[Sauron_Vie]

did i understand this correct, that a increase of the SA can stabilize the IO then ?

[Raja@ASUS]

did i understand this correct, that a increase of the SA can stabilize the IO then ?

For memory overclocking? Not in my experience thus far or those of several testers I work with. If you have a board it might be worth seeing for yourself what works for you and does not.

-Raja

[Sauron_Vie]

in memory oc my experience was that increasing the SA is "little" helpful to get 2x4GB stable. for 2x2GB it was not necessary @all, but the main focus in both options was giving the IO a little bump.


thx Raja

[Raja@ASUS]

in memory oc my experience was that increasing the SA is "little" helpful to get 2x4GB stable. for 2x2GB it was not necessary @all, but the main focus in both options was giving the IO a little bump.


thx Raja

No worries. Praz has had DDR3-2300 speeds from 8GB (4GB modules) and DDR3-2133 from 16GB (4X4GB) and has not had to touch VCCSA but did have to move VCCIO which is quite telling.

-Raja

[Sauron_Vie]

ok, thx for Info. Sounds great. have to test much more. Got my MIVE 2 weeks ago. Maybe i was a little bit to scared with that IO Voltage

[Raja@ASUS]

ok, thx for Info. Sounds great. have to test much more. Got my MIVE 2 weeks ago. Maybe i was a little bit to scared with that IO Voltage

Cool SV, be sure to go up/down in small steps. Too high can also cause instability.

-Raja

[Sauron_Vie]

Cool SV, be sure to go up/down in small steps. Too high can also cause instability.

-Raja

thx mate, ur hints r very helpful.

[Barso]

I installed my W7 OS onto my SSD with AHCI and hotplugging turned on in the BIOS. But I left the jmicron enabled on the red intel sata port.
If I disable the jmicron in BIOS, the PC doesn't boot into the OS anymore.
I am using the intel driver from the asus DL site.
Is there anyway to disable the jmicron controller and boot from the SSD?
Thanks.

[Olly_K]

I installed my W7 OS onto my SSD with AHCI and hotplugging turned on in the BIOS. But I left the jmicron enabled on the red intel sata port.
If I disable the jmicron in BIOS, the PC doesn't boot into the OS anymore.
I am using the intel driver from the asus DL site.
Is there anyway to disable the jmicron controller and boot from the SSD?
Thanks.

You need to use the red SATA ports next to the black SATA ports