ASUS Intel Beta BIOS Releases and Official Support

[Raja@ASUS]

Hello Raja

I also think it's great Asus is stepping forward with some solid 'in-the-field' support

Okay so we may never have independent QPI PLL control in R3E bios. But can you try to find out what the voltage is set to for QPI PLL?

And regarding the QPI PLL voltage being linked to CPU PLL, I think this may be true. I get drastically varying results when running SPI32M and trying different CPU PLL values, but keeping all other voltages same..

I believe it was a Asus support guy or OCer (LardArse) who said the PLL values were linked.

Please refer to my previous post about the DC requirements of the CPU PLL rail and the QPI PLL rail. To clarify; the CPU PLL rail needs a minimum of 1.8V at stock, while QPI PLL requires 1.1V and both should be regulated. 32M as an example means nothing as the QPI bus plays no real part in Super Pi. I'd be looking at vIOH first and foremost due to the DC requirements of that rail being similar.

-Raja