***Asus Rampage III Extreme Owners Thread***

[Raja@ASUS]

Doesn't seem to cause any stability issues (1 day 23 hours so far) to have them set as is. Also gives me a little more bandwidth. Do we know the actual relationship?

I took the timings that my memory would run at 1600MHz, divided by the stock timings to find the time in ns that would be required for state to be saved, then calculated out the timings at 2000MHz based on the times I found... These are the closest settings...

For example: tWR for my ram at 1600Mhz is 7. So that's ~230ns, right?
Some simple algebra later: 2000 / x = 230 x = ~8.7

Maybe I've messed up my understanding somewhere, but I'm pretty sure that's correct...

The tWR setting is intrinsically tied to tRL in the Intel MRC code. The tables offset at 4,6,8,10,12,14, 16..... Try using a tWR setting of 10 on 1301 and see if the system is stable - if it isn't I'll make a case for having tRL open.

The table default on this platform is set for 10ns~12ns cycle time on tWR at every 266MHz step (offsetting at higher frequency to promote stability) - that's how Intel programs it. Setting the table anywhere else means you then have to force a tRL to a looser value than would have been used at the next clock offset - which effectively gives you the same performance or trades one for the other as running that default table. I've managed to force a tWR of 4 at DDR3-2000 on some Hyper modules, but the performance was the same as running 10 clocks for tWR on the default table.

That's why once we found the major problem of DIMMs dropping, the tRL option was removed.


-Raja