What to Expect From AMD at ISSCC 2011

[JF-AMD]

UPDATE 2: Bulldozer Module VS Magny-Cours

http://www.computerbase.de/bildstrecke/33300/2/

Any comparison vs. MC would come from my blog. Period.

If im not mistaken, DENEBs integer Execution unit has 3 integer pipes PLUS 3 Loas/Store (AGUs) pipes when Bulldozer Integer Execution Unit has 2 integer pipes PLUS 2 AGen(Address Generator).

So we have 3 int pipes for DENEB vs 2 int pipes for each BD Integer Execution Unit.

old architecture is 3 ALU/AGU pipelines which are shared. New architecture is 2 ALU + 2 AGU, all dedicated.

That's early! Epic!

Edit: wait, it's not a release, it's a presentation. Or do I get it wrong?

Don't expect much, this is not a luanch.

The DENEB don’t have FP FMACs but 3x Pipelines, FADD, FMUL,FMISC
Bulldozer FP has 4x pipelines, 2x 128-bit FMACs and 2x 128-bit MMX and one FP shared Scheduler that can issue 4x uops to the FP execution unit.

yes, that was a typo, we corrected it since then

But JF also said that he don't know anything about what's going on at the desktop side.

yes, but launch plans are shared between divisions, and I was having a beer with the desktop BD guy last monday, we stay in contact.