I've observed this effect enough to come back to this thread looking for answers. And it looks like I'm not alone.
So here's my conclusion on the problem. Feel free to correct me anywhere if I'm wrong.
The problem with the LLC is that the load voltages are different depending on your actual load on the processor.
With LLC on the load voltage is highest when all cores are under load.
Say that you're stable with 1.400v under 4 cores.
But when you reduce the load to say 1 core, LLC will pull back the voltage to like 1.200v. When that happens - instant BSOD. Reason: 1.200v is simply not enough for your current clock.
What you need is to hold 1.400v regardless of load. The only time it should be allowed to go down is when SpeedStep kicks in and actually lowers your frequency.
Over the past week or so, I was quite baffled at why my chip needed 1.400v to hold 4.6GHz stable over a 36 hour (not perfectly paralleled) task when it appeared to be prime and LinX stable at 4.7 GHz.
So I'll be playing around with lower LLC settings and higher voltage offsets.
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