Quote Originally Posted by demonkevy666 View Post
Let's take a look at what we do know about bulldozer

Shared L1 instruction cache for two cores in one module (no size yet Although I could go with 128Kbytes for speculation)
separate L1 data cache 16 Kbytes per core
2Mbs L2 cache shared for two cores in one module.
8Mbs of 2400mhz L3 cache
1866mhz memory
SSSE3 SSE4.1 SSE4.2 AVX I'm sure more I didn't list

I think it would have less missed IPC then phenom II.
don't know if L1/L2 cache in Exclusive or inclusive type yet.

sandybridge doesn't worry me at all, it's like K8<K10/K10.5 really with a few bonuses.
Cache is exclusive.

IPC will be higher.

We have not said anything on memory other than 1600MHz on server.