QPI PLL = CPU PLL on R3E, same source
ie, you adjust 1.45v CPU PLL = 1.45v qpi pll as well, plane is tied together so there is no way to seperate.
It did not have an effect on oc for qpi pll last i tried ; what are you trying to accomplish with qpi pll?
So, you say that QPI PLL (which default is 1.1V) is set at 1.8V, when CPU PLL is left at default (1.8V). It would be insane IMO.Originally Posted by LardArse
QPI PLL = CPU PLL on R3E, same source
ie, you adjust 1.45v CPU PLL = 1.45v qpi pll as well, plane is tied together so there is no way to seperate.
It did not have an effect on oc for qpi pll last i tried ; what are you trying to accomplish with qpi pll?
Last edited by donmarkoni; 12-22-2010 at 12:06 AM.
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A terminology confusionSo, you say that QPI PLL (which default is 1.1V) is set at 1.8V, when CPU PLL is left at default (1.8V). It would be insane IMO.
VTT = QPI/DRAM voltage = default 1.1v
QPI PLL and CPU PLL default is 1.80v.
I didn't misunderstood you, AFAIK QPI PLL default is 1.1V.
Maximus 5 Gene | i7-3770K @ 5GHz | ADATA 2x2GB @ 2.6GHz 9-12-10-28-1T | HD7970 @ 1200/6400
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on which brand's naming convention?
ok Lardarse look at this guys postin the 4.5ghz stable club.... you can clearly see that the default for QPI PLL is 1.1V
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ah ok, i dont know if its just a naming clash, i meant what is called 'qpi pll' on evga MBs default is 1.80vok Lardarse look at this guys postin the 4.5ghz stable club.... you can clearly see that the default for QPI PLL is 1.1V
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I was hoping you would postQPI PLL = CPU PLL on R3E, same source
ie, you adjust 1.45v CPU PLL = 1.45v qpi pll as well, plane is tied together so there is no way to seperate.
It did not have an effect on oc for qpi pll last i tried ; what are you trying to accomplish with qpi pll?
It's my understanding that it assists in higher bclk stability.
No, that is not what assists bclk stabilityI was hoping you would post
It's my understanding that it assists in higher bclk stability.
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