could still be that cayman has 1920sps, and the yield problem isnt about them being broken, but all the sps running too hot, which is why they had to disable sps...
less sps at higher clocks seem to be faster than more sps at lower clocks... so this would make sense, especially if you factor in that mem bw isnt infinitive...

so what, after amd doing 40nm right, they somehow "forgot" how to design a chip for that node?
this doesnt make any sense whatsoever... wth is going on at amd???