AMD: 32nm issues fixed

[Oliverda]

the answer is fairly simple. the problems that SOI fixes are not the major problems at sub 45nm.

i will give SOI credit where it is due: it looks nice for finfets. other than that i dont care for it.

What are the the problems that SOI fixes?

[demonkevy666]

That's true,the 2011 Bulldozer is a reworked 2008 design.But the good thing about BD is AMD's ability to gradually improve this design as we saw in the Analyst Day presentation.We practically get the tick-tock model from AMD,with tocks not necessarily tied in to node transitions since the module design allows AMD to pack more cores into same die area and after that improve those cores(BD enhanced/BD Next Gen coming 1 and 2 years after first BD comes in Q2). BD version 2011 will be around 10-35% faster than Stars cores gen ,per core and per clock ,with much higher clock potential and 33% more cores to start with. This alone should put AMD in very competitive position,apart from the previously mentioned part about compact core/module design and modularity/scalability of BD design.


Yeah it should be(too),but you should know better than to quote them without checking the primary source which is Analyst Day .

where did you get those numbers ?

[JumpingJack]

What are the the problems that SOI fixes?

SOI in and of itself doesn't fix anything, there is nothing broken with a bulk transistor.

The primary benefit from SOI is the elimination of junction capacitance, or at least the JC is greatly reduced as there is still some capacitance that sets up across the oxide.

Other benefits include, reduced short channel effects, elimination of thysistors (latching), and reduction of junction leakage.

SOI, though, comes with it's own set of headaches, including self-heating, kink-effects, and hysteresis (memoriziation -- exploited in some cases, called Z-RAM). These have their own design challenges.

[FlanK3r]

demon:or do u think, total new architecture will not be better then K10 ? :-D ...

[informal]

where did you get those numbers ?

Old news.AT got them from AMD 1 year ago:
http://www.anandtech.com/Show/Index/...&sort=0&page=2

According to AMD's roadmaps, Zambezi will use either 4 or 8 Bulldozer cores (that's 2 or 4 modules). The quad-core Zambezi should have roughly 10 - 35% better integer performance than a similarly clocked quad-core Phenom II. An eight-core Zambezi will be a threaded monster.

BTW,the code name for the die is Orochi. What is Orochi?

Yamata no Orochi (八岐の大蛇?, lit. "8-branched giant snake")- a legendary 8-headed and 8-tailed Japanese dragon

If AMD named the die after a legendary super powerful mythological eight headed /8 tailed dragon,you get a hint how wicked it is . 8 Cores/ 8 threads association comes to mind .

Wicked.

[Sn0wm@n]

orochi ftw

[Chumbucket843]

SOI in and of itself doesn't fix anything, there is nothing broken with a bulk transistor.

if you set the problem up properly yes, it does fix issues with bulk transistors. it's not just about functionality. remember the whole performance aspect?
personally i would consider all of the non-ideal effects of modern transistors as a serious problem, kind like the ones you mentioned.

lower parasitic delay is a nice feature too. circuits with high fan outs will be faster on SOI.

[JF-AMD]

Old news.AT got them from AMD 1 year ago:
http://www.anandtech.com/Show/Index/...&sort=0&page=2

Those numbers may have been in an article, but that does not necessarily mean that they came from AMD.

Pretty sure we haven't made any performance claims other than the server claim (50% more throughput relative to today's 12-core).

[qcmadness]

Could you show us some evidence for this?


Btw there are some rumours that the SOI will be crucial under 22nm for everybody including Intel as well.

http://leitl.org/docs/intel/IR-TR-2000-3-soi2000.pdf

However, the expected performance gain for PD-SOI diminishes dramatically for 50nm devices due to (i) aggressive reduction of junction capacitance for our bulk CMOS, (ii) the reduced impact of area junction capacitance with scaling, and (iii) increased history effect on delay for scaled Vdd.

[informal]

@JF-AMD

I'm not sure where he got them ,but I won't be surprised if BD desktop gets in that ballpark.You said IPC goes up so 10+% range in int workloads is reasonable.

[Dimitriman]

This is me contemplating my next system:


me: Hurray Bulldozer sounds like it's gonna rock think I'll buy that!

news: 32nm problems causes Bulldozer delays...

me:

[lutjens]

This would've mattered much more a year ago, with the same thought extending to BD as well.

[JumpingJack]

if you set the problem up properly yes, it does fix issues with bulk transistors. it's not just about functionality. remember the whole performance aspect?
personally i would consider all of the non-ideal effects of modern transistors as a serious problem, kind like the ones you mentioned.

lower parasitic delay is a nice feature too. circuits with high fan outs will be faster on SOI.

Oddly, bulk transistors have improved performance with every node, and has so since scaling began. There is nothing wrong with bulk transistor performance and improvement within the progression of Moore's Law, in fact bulk PMOS holds the record (well above SOI) for drive currents.

We are arguing semantics, saying it fixes something implies that it is broken and that is indeed not the case. HKMG is an example of a fix, because SiON scaling is broken, it stopped after 90 nm (bulk, SOI or otherwise). In fact, AMD's 45 nm transistors increased the SiON thickness from 1.3 nm to 1.4 nm, if I recall correctly.

One could turn the argument on it's ear, bulk technology fixes the problems with SOI (1/2 the self-heating, no floating body effect, yada yada yada). All things considered, SOI is a different way of isolating the transistor body from the substrate, and carries with it better parametrics in some areas and problematic issues in other areas. Engineering the best transistor on bulk will not yield the same result if that were simply transported to an SOI substrate and vice versa. Hence, these claims of 'better' this and 'higher' that of SOI over bulk need to be understood in the right context, simply engineering the best transistor on SOI then building the same transistor on bulk will always yield a better result on SOI.

IBM, when they were evangalizing SOI as the next best thing, claimed that scaling on bulk was dead, that SOI was the only option. Intel claimed that bulk would continue scaling and at lower costs. So far, bulk has indeed continued scaling -- even when IBM claimed it would not be possible after 90 nm.

[god_43]

if intel is using soi for 22nm....they are not doing it for s and giggles. it must still have better advantages than it does negatives.

[STEvil]

I think Intel/AMD know what they are doing with regards to SOI...

[zalbard]

I think Intel/AMD know what they are doing with regards to SOI...

And probably do better than all of us posting here.

[saaya]

That's true,the 2011 Bulldozer is a reworked 2008 design.But the good thing about BD is AMD's ability to gradually improve this design as we saw in the Analyst Day presentation.We practically get the tick-tock model from AMD,with tocks not necessarily tied in to node transitions since the module design allows AMD to pack more cores into same die area and after that improve those cores(BD enhanced/BD Next Gen coming 1 and 2 years after first BD comes in Q2). BD version 2011 will be around 10-35% faster than Stars cores gen ,per core and per clock ,with much higher clock potential and 33% more cores to start with. This alone should put AMD in very competitive position,apart from the previously mentioned part about compact core/module design and modularity/scalability of BD design.


Yeah it should be(too),but you should know better than to quote them without checking the primary source which is Analyst Day .

well, we will see... but to me this sounds a lot like here is bd1.1 or 1.2 BUT bd2 is coming very soon!
when they know that after this delay they really should have bd2 ready to begin with... NOW... and not "very soon" which will probably turn into "soon" and maybe even "in 2 years" in the end...

It was fishy from the start, they announced it 2 weeks before the release of K10. That was quite strange, but knowing that K10 didn't deliver, I guess they made this announcement to keep the stock up as Mubdala bought them in 3 months after this. Or maybe it was a show for Mubdala to keep their spirits up.

internally amd already talked about k10 after c2d launched... but yeah, your probably right
and it sounds like all this bd2 talk right now is very similar to what happened back then...
i mean bd1 isnt even out and amd is talking about bd2 already and that its coming soon? how anybody can find this reassuring is beyond me... thats a very strong hint at bd1 not doing that well if you ask me...

when you launch or prepare to launch a new product, its THE best, THE most awesome, THE fastest blablabla... you want to sell it and highlight how awesome it is... if you tell everybody your going to have something much better very soon, your ruining your own product launch... why would i buy a 6850 if i KNOW a 6950 is just around the corner that doesnt cost a lot more and performs a lot better?

30% advantage on average, 4.5 times the price, 29% smaller node. Even with 32nm I don't it as a very efficient chip.

Then X6 1055T 95w @3.6Ghz consumes less than 1090T at stock speeds.

30% advantage on average with 13% more heat, so average performance per watt is over 15% worse than intel... thats actually not bad for being a node behind...

about the price... well companies exist to make money, agreed? so companies always sell their products for as much as they can, agreed? so if a product sells for a very low price, it means there is either no demand or people simply arent willing to spend more on it because it doesnt do what they want it to do.

amd selling chips for low prices is not "good"
amd doesnt do that cause it loves the community... it does that because it HAS to lower prices that much to actually sell off their inventory and make money...

amds approach is not more advanced and successful because they sell their product for lower prices, thats a sign of them not being competitive.

and while performance per watt for six cores is actually not bad for being a node behind, its actually pretty impressive...
it doesnt make it a good thing though... think about where amd could be if they werent a node behind...

thx aberration and chumbucket for the infos
so how true is it that SOI is useless, or not as effective below a certain node? ive read that several times, even coming from amd people...

[marten_larsson]

well, we will see... but to me this sounds a lot like here is bd1.1 or 1.2 BUT bd2 is coming very soon!
when they know that after this delay they really should have bd2 ready to begin with... NOW... and not "very soon" which will probably turn into "soon" and maybe even "in 2 years" in the end...

internally amd already talked about k10 after c2d launched... but yeah, your probably right
and it sounds like all this bd2 talk right now is very similar to what happened back then...
i mean bd1 isnt even out and amd is talking about bd2 already and that its coming soon? how anybody can find this reassuring is beyond me... thats a very strong hint at bd1 not doing that well if you ask me...

when you launch or prepare to launch a new product, its THE best, THE most awesome, THE fastest blablabla... you want to sell it and highlight how awesome it is... if you tell everybody your going to have something much better very soon, your ruining your own product launch... why would i buy a 6850 if i KNOW a 6950 is just around the corner that doesnt cost a lot more and performs a lot better?

Well, this was an analyst meeting and surely the analysts would like to know what's to come in the next year or two, not just the following two quarters. Actually I think there is some double standards here; AMD either gets about not giving out info on coming CPUs, when they actually do they get bashed because that indicates their current generation isn't up to speed? It's like saying Intel's Tick is bad because you know there's going to be a Tock soon enough.

On the GPU side I believe it's a bit easier to understand why there aren't that many mentionings about future products. GPUs are for gamers mainly, HPC's in some extent too, and gamers don't need info on the upcoming products two years in advance like server folks do. AMD wanted to show that BD will be followed by an enhanced BD in 2012 (roughly put more cores as I understood it) and a new generation BD in 2013 and that the enhanced version would be drop in upgrade for servers.

[Hans de Vries]

SOI in and of itself doesn't fix anything, there is nothing broken with a bulk transistor.

The primary benefit from SOI is the elimination of junction capacitance, or at least the JC is greatly reduced as there is still some capacitance that sets up across the oxide.

Other benefits include, reduced short channel effects, elimination of thysistors (latching), and reduction of junction leakage.

SOI, though, comes with it's own set of headaches, including self-heating, kink-effects, and hysteresis (memoriziation -- exploited in some cases, called Z-RAM). These have their own design challenges.

4 hours of "SOI jump start training" here:
http://cadence.mediasite.com/mediasi...9c4ce7d2f1d93a


Regards, Hans

[JF-AMD]

Well, this was an analyst meeting and surely the analysts would like to know what's to come in the next year or two, not just the following two quarters. Actually I think there is some double standards here; AMD either gets about not giving out info on coming CPUs, when they actually do they get bashed because that indicates their current generation isn't up to speed? It's like saying Intel's Tick is bad because you know there's going to be a Tock soon enough.

On the GPU side I believe it's a bit easier to understand why there aren't that many mentionings about future products. GPUs are for gamers mainly, HPC's in some extent too, and gamers don't need info on the upcoming products two years in advance like server folks do. AMD wanted to show that BD will be followed by an enhanced BD in 2012 (roughly put more cores as I understood it) and a new generation BD in 2013 and that the enhanced version would be drop in upgrade for servers.

You are exactly right. This was an analyst meeting. You will not that we said very little about the follow on after Bulldozer other than give a placeholder on the roadmap (and core counts on server.) Beyond that we literally said nothing.

If Saaya had spent any time with the financial analysts they would know the types of information that the analysts would be looking for. And, if you want to be fair, Intel has said a lot more about Ivy Bridge and even Haswell than we have said about our future products beyond Bulldozer.

[JumpingJack]

4 hours of "SOI jump start training" here:
http://cadence.mediasite.com/mediasi...9c4ce7d2f1d93a


Regards, Hans

Hans,

Thanks for the link. Imagine that the SOI consortium would give such a nice presentation on all the greatness of SOI, I would have never have guessed. They nicely hit upon all the benefits, most I listed above. And even one had one slide on the design challenges, again on items I listed above.

Regards,
Jack

[saaya]

fair enough, criticizing amd for talking about bd2 was wrong, my bad...

[qcmadness]

Oddly, bulk transistors have improved performance with every node, and has so since scaling began. There is nothing wrong with bulk transistor performance and improvement within the progression of Moore's Law, in fact bulk PMOS holds the record (well above SOI) for drive currents.

We are arguing semantics, saying it fixes something implies that it is broken and that is indeed not the case. HKMG is an example of a fix, because SiON scaling is broken, it stopped after 90 nm (bulk, SOI or otherwise). In fact, AMD's 45 nm transistors increased the SiON thickness from 1.3 nm to 1.4 nm, if I recall correctly.

One could turn the argument on it's ear, bulk technology fixes the problems with SOI (1/2 the self-heating, no floating body effect, yada yada yada). All things considered, SOI is a different way of isolating the transistor body from the substrate, and carries with it better parametrics in some areas and problematic issues in other areas. Engineering the best transistor on bulk will not yield the same result if that were simply transported to an SOI substrate and vice versa. Hence, these claims of 'better' this and 'higher' that of SOI over bulk need to be understood in the right context, simply engineering the best transistor on SOI then building the same transistor on bulk will always yield a better result on SOI.

IBM, when they were evangalizing SOI as the next best thing, claimed that scaling on bulk was dead, that SOI was the only option. Intel claimed that bulk would continue scaling and at lower costs. So far, bulk has indeed continued scaling -- even when IBM claimed it would not be possible after 90 nm.

But the scaling of gate is not in progress lately (without HK/MG).

fair enough, criticizing amd for talking about bd2 was wrong, my bad...

People can criticize whatever they want.
It would be better not to claim performance numbers rather than hyping and then fail to commit.

[JumpingJack]

But the scaling of gate is not in progress lately (without HK/MG).

That was my point, HKMG fixes a fundamental issue that is indeed broken. Scaling of the gate oxide for SiON stopped after 90 nm. Gate oxides have not gone thinner, unless, of course you consider IBM's 65 nm 5 GHz monster, where they went to a 0.9 nm gate -- but they did that for the speed deamon approach. They paid the price in gate leakage.

[Chumbucket843]

Oddly, bulk transistors have improved performance with every node, and has so since scaling began. There is nothing wrong with bulk transistor performance and improvement within the progression of Moore's Law, in fact bulk PMOS holds the record (well above SOI) for drive currents.

moore's law is not everything. transistor performance is still important as i have said previously.

furthermore, using intel's process as evidence that bulk is faster is not correct. drive currents are important but FO4 inverter delays are a much better metric because drive current does not factor in capacitance or voltage which are essential to delay. getting such PMOS drive currents required a lot of doping which can lead to higher dopant fluctuations. gate pitch on intel's 32nm process isnt all that impressive and neither is their SRAM cell size. speed did hurt size imo.

We are arguing semantics, saying it fixes something implies that it is broken and that is indeed not the case. HKMG is an example of a fix, because SiON scaling is broken, it stopped after 90 nm (bulk, SOI or otherwise). In fact, AMD's 45 nm transistors increased the SiON thickness from 1.3 nm to 1.4 nm, if I recall correctly.

i'm not debating semantics. i am trying to clarify what i am saying because i dont want to look like a jackass. it's starting to look like an SOI v. HKMG argument which is dumbtarded. a problem does not have to be so straight forward. for example: "our process is not fast enough. how can we improve its performance?". that's a problem. SOI may be able to fix it. the problem does not have to be as extreme as gate leakage where functionality is slowly being destroyed.

also HKMG is performance oriented. you can make a functional transistor on 45nm or 32nm with polySi or SiON gate dielectrics. it just would not be impressive. eventually leakage would cause transistors to act like attenuators but that's ways off.